KR0172539B1 - Method of forming s.o.g. in a semiconductor device - Google Patents
Method of forming s.o.g. in a semiconductor device Download PDFInfo
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- KR0172539B1 KR0172539B1 KR1019950012711A KR19950012711A KR0172539B1 KR 0172539 B1 KR0172539 B1 KR 0172539B1 KR 1019950012711 A KR1019950012711 A KR 1019950012711A KR 19950012711 A KR19950012711 A KR 19950012711A KR 0172539 B1 KR0172539 B1 KR 0172539B1
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- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 150000002500 ions Chemical class 0.000 claims abstract description 12
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 239000011229 interlayer Substances 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000000137 annealing Methods 0.000 abstract description 2
- 230000015556 catabolic process Effects 0.000 abstract 1
- 238000006731 degradation reaction Methods 0.000 abstract 1
- 230000008595 infiltration Effects 0.000 abstract 1
- 238000001764 infiltration Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 11
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 238000010521 absorption reaction Methods 0.000 description 6
- 229910008284 Si—F Inorganic materials 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910007991 Si-N Inorganic materials 0.000 description 1
- 229910008051 Si-OH Inorganic materials 0.000 description 1
- 229910006294 Si—N Inorganic materials 0.000 description 1
- 229910006358 Si—OH Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009172 bursting Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Abstract
본 발명은 반도체 소자의 에스. 오. 지(SOG)막 형성방법에 관한 것으로, 수분의 침투로 인한 소자의 전기적특성 저하를 방지하기 위하여 SOG를 도포한 후 플라즈마 이온을 이용한 열처리(Anneal)공정을 실시하여 막 자체의 수분 흡수력을 저하시키므로써 소자의 신뢰성이 향상될 수 있도록 한 반도체 소자의 에스. 오. 지막 형성방법에 관한 것이다.The invention of the semiconductor device S. Five. A method of forming a SOG film, which is applied to SOG to prevent degradation of electrical characteristics of a device due to infiltration of moisture, and then performs an annealing process using plasma ions. S. semiconductor element to improve the reliability of the device. Five. It relates to a film formation method.
Description
제1a도 내지 제1d도는 본 발명에 따른 반도체 소자의 에스. 오. 지막 형성방법을 설명하기 위한 소자의 단면도.1A to 1D illustrate the S. of the semiconductor device according to the present invention. Five. Sectional drawing of the element for explaining the formation method of a film.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 제1층간절연막 2 : 금속층1: first interlayer insulating film 2: metal layer
3 : ARC층 4 : 제2층간절연막3: ARC layer 4: Second interlayer insulating film
5 : SOG막5: SOG film
본 발명은 반도체 소자의 에스. 오. 지(SOG)막 형성방법에 관한 것으로, 특히 에스. 오. 지(이하, SOG(Spin-On-Glass)라 칭함)를 도포한 후 플라즈마 이온(Plasma ion)을 이용한 열처리(Anneal)공정을 실시하여 막 자체의 수분 흡수력을 저하시키므로써 소자의 신뢰성이 향상될 수 있도록 한 반도체 소자의 에스. 오. 지막 형성방법에 관한 것이다.The invention of the semiconductor device S. Five. A method for forming a SOG film, particularly S. Five. Paper (hereinafter referred to as Spin-On-Glass) and then subjected to an annealing process using plasma ions to reduce the water absorption of the film itself, thereby improving the reliability of the device. To make one semiconductor device s. Five. It relates to a film formation method.
일반적으로 SOG는 점도가 크기 때문에, 도포후 평탄도가 우수하며 갈라짐(Crack)에 대한 내성이 크다는 장점이 있다. 또한 SOG는 주로 회전(Spin) 도포방법에 의해 도포되며, 도포후에 경화공정을 거치면 고체화되기 때문에 절연막으로써의 역할을 하기도 한다. 그래서 반도체 소자의 제조공정에서는 SOG막을 비교적 단차가 많은 금속층간의 절연 및 평탄화를 목적으로 사용한다. 그런데 SOG막은 막자체의 수분 흡수력이 강하여 그 상부에 형성되는 금속층 또는 보호막의 터짐을 유발시키거나, 콘택홀내에서는 하부의 금속층을 산화시켜 금속배선의 자체저항을 증가시키기도 한다. 그러므로 금속층간의 접속이 불량해지고 단선이 유발되어 소자의 신뢰성이 저하된다. 또한, 소자의 동작시 SOG막은 흡수한 수분을 방출하는데, 방출된 수분은 트랜지스터를 구성하는 게이트산화막과 실리콘기판의 사이 또는 필드산화막과 실리콘기판 사이의 미결합된 실리콘본드에 포획되어 트랜지스터의 핫 케리어(Hot carrier)의 열화를 야기시키고 필드반전(Field inversion)을 일으켜 소자의 전기적특성이 저하된다.In general, since SOG has a high viscosity, it has the advantage of excellent flatness after coating and high resistance to cracking. In addition, SOG is mainly applied by a spin coating method, and also serves as an insulating film because it solidifies after a curing process after application. Therefore, in the manufacturing process of a semiconductor device, an SOG film is used for the purpose of insulation and planarization between metal layers with a relatively high level of difference. However, the SOG film has a strong water absorption ability of the film itself, causing the metal layer or the protective film to burst, or oxidizing the lower metal layer in the contact hole, thereby increasing the self-resistance of the metal wiring. Therefore, the connection between the metal layers is poor and disconnection is caused, thereby degrading the reliability of the device. In addition, during operation of the device, the SOG film releases the absorbed moisture, which is trapped by the unbonded silicon bond between the gate oxide film and the silicon substrate constituting the transistor or between the field oxide film and the silicon substrate, and thus the hot carrier of the transistor. It causes deterioration of the hot carrier and causes field inversion, which degrades the electrical characteristics of the device.
따라서 본 발명은 SOG를 도포한 후 플라즈마 이온을 이용한 열처리공정을 실시하며 막 자체의 수분 흡수력을 저하시키므로써 금속층이나 보호막의 터짐을 방지하고 금속배선의 자체저항 증가를 억제하며, 핫 케리어의 열화 및 필드 반전 현상을 방지할 수 있는 반도체 소자의 에스. 오. 지막 형성방법을 제공하는 데 그 목적이 있다.Therefore, the present invention performs a heat treatment process using plasma ions after the application of SOG, and by lowering the water absorption of the film itself to prevent bursting of the metal layer or the protective film, to suppress the increase of the self-resistance of the metal wiring, deterioration of hot carrier S. of semiconductor device capable of preventing field reversal. Five. The purpose is to provide a method for forming a film.
상술한 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 에스. 오. 지막 형성방법은 금속 패턴이 형성된 제1층간절연막상에 제2층간절연막을 형성한 후 전체상부면에 SOG를 도포하고 경화시켜 SOG막을 형성하는 단계와, NF3가스를 이용하여 생성시킨 플라즈마 이온으로 상기 SOG막을 1차 열처리하는 단계와, 상기 1차 열처리된 SOG막 내에 존재하는 OH, H2O, CHX, FX를 외부로 방출시키기 위해 2차 열처리 공정을 실시하는 단계로 이루어지는 것을 특징으로 한다.S. of the semiconductor device according to the present invention for achieving the above object. Five. The method of forming a film includes forming a second interlayer insulating film on a first interlayer insulating film on which a metal pattern is formed, and then applying SOG to the entire upper surface to form an SOG film, and forming plasma by using NF 3 gas. Firstly heat treating the SOG film, and performing a second heat treatment process to release OH, H 2 O, CH X , and F X present in the first heat-treated SOG film to the outside. do.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제1a도 내지 제1d도는 본 발명에 따른 반도체 소자의 에스. 오. 지막 형성방법을 설명하기 위한 소자의 단면도로서, 제1a도는 소정의 반도체 소자 제조공정을 거치면서 형성된 제1층간절연막(1)상에 알루미늄(Al)과 같은 도전물을 증착하여 금속층(2)을 형성하고 그 상부에 티타늄나이트라이드(TiN)를 증착하여 ARC층(3)을 형성한 다음 소정의 마스크(Mask)를 이용한 사진 및 식각공정으로 상기 ARC층(3) 및 금속층(2)을 순차적으로 패터닝한 상태의 단면도이다.1A to 1D illustrate the S. of the semiconductor device according to the present invention. Five. FIG. 1A is a cross-sectional view of a device for explaining a method of forming a film, and a metal layer 2 is formed by depositing a conductive material such as aluminum (Al) on a first interlayer insulating film 1 formed through a predetermined semiconductor device manufacturing process. Form the ARC layer 3 by depositing titanium nitride (TiN) thereon, and sequentially forming the ARC layer 3 and the metal layer 2 by a photo and etching process using a predetermined mask. It is sectional drawing of the patterned state.
제1b도는 전체상부면에 제2층간절연막(4)을 형성한 후 평탄화를 위하여 SOG를 도포하고 200 내지 400℃의 온도에서 경화시켜 SOG막(5)을 형성한 상태의 단면도이다.FIG. 1B is a cross-sectional view of a state in which the SOG film 5 is formed by forming a second interlayer insulating film 4 on the entire upper surface and then applying SOG for planarization and curing at a temperature of 200 to 400 ° C.
제1c도는 NF3가스를 이용하여 플라즈마를 생성시키고, 그 플라즈마 이온의 피폭(Ion bambardment)에 의해 상기 SOG막(5)이 1차 열처리되는 상태의 단면도인데, 상기 플라즈마는 화학기상증착(Chemical Vapor Deposition : CVD)장비 또는 플라즈마 장비에서 생성시키며, 상기 NF3가스는 0.5 내지 5 SLM 정도로 공급한다. 또한 고주파(13.56MHZ) 및 저주파(300 내지 500KHZ)전력을 동시에 인가하여 이온의 피폭에 의한 효과를 증대시킨다. 그러면 여기서 상기와 같은 플라즈마 처리에 의해 얻어지는 효과를 설명하면 다음과 같다.FIG. 1C is a cross-sectional view of a state in which a plasma is generated by using NF 3 gas and the SOG film 5 is primarily heat-treated by ion bambardment of the plasma ions. The plasma is chemical vapor deposition. Deposition: Produced in CVD) equipment or plasma equipment, the NF 3 gas is supplied to about 0.5 to 5 SLM. In addition, high frequency (13.56MHZ) and low frequency (300 to 500KHZ) power are simultaneously applied to increase the effect of ion exposure. The following describes the effects obtained by the plasma treatment as described above.
상기 플라즈마에 의해 상기 NF3가스는 해리 및 이온화되어 N+, F+, NFX +등의 래디컬(Radical)이 생성되고, 이 래디컬이 상기 SOG막(5)에 피폭되는데, 이때 상기 N+등의 이온은 플라즈마에 의해 손상된 SOG막(5)내의 미결합팔의 수분흡착 위치를 감소시키며, 표면에 Si-N 본드를 생성시켜 상기 SOG막(5) 표면을 산화질화막(Oxynitride)과 같은 형태로 만들기 때문에 상기 SOG막의 수분 흡수력이 감소된다. 또한 F+또는 NFX +이온 등은 SOG막(5)내에서 전기 음성도가 큰 불소(F)에 의해 Si-OH 결합을 Si-F 결합으로 치환시키고 OH 이온을 외부로 방출시킨다. 더우기 치환된 상기 Si-F 결합은 Si-O 결합력을 강화시켜 대기중의 수분(H2O) 침투에도 파괴되지 않게 하므로 상기 SOG막의 수분 흡수력이 효과적으로 감소된다.The NF 3 gas is dissociated and ionized by the plasma to generate radicals such as N + , F + , NF X +, and the radicals are exposed to the SOG film 5, wherein the N +, etc. Ions reduce the water adsorption position of the unbound arm in the SOG film 5 damaged by the plasma, and form a Si-N bond on the surface to form the surface of the SOG film 5 in the form of an oxynitride. Because of this, the water absorption of the SOG film is reduced. In addition, F + or NF X + ions replace Si-OH bonds with Si-F bonds by fluorine (F) having a high electronegativity in the SOG film 5, and release OH ions to the outside. Furthermore, the substituted Si-F bond enhances the Si-O bonding force so that the Si-F bond is not destroyed even by penetration of moisture (H 2 O) into the air, thereby effectively reducing the water absorption of the SOG film.
제1d도는 상기 플라즈마 처리후 400 내지 450℃의 온도에서 2차 열처리하는 상태의 단면도인데, 이는 SOG막(5)내에서 결합을 이루지 않고 잔류하는 불소(F)이온 또는 분자 등을 외부로 방출시키며, 결합을 이루되 약한 결합을 이루어 후속공정에서 절단됨으로 인해 소자의 동작을 열화시킬 수 있는 OH, H2O, CHX, FX등을 외부로 방출시키기 위함이다.FIG. 1d is a cross-sectional view of a second heat treatment at a temperature of 400 to 450 ° C. after the plasma treatment, which releases fluorine (F) ions or molecules remaining without bonding in the SOG film 5 to the outside. In order to release the OH, H 2 O, CH X , F X, etc., which may deteriorate the operation of the device due to the weak bond, but the bond is made in the subsequent process.
상술한 바와 같이 본 발명에 의하면 SOG를 도포한 후 플라즈마 이온을 이용한 열처리공정을 실시하여 막 자체의 수분 흡수력을 저하시키므로써 소자의 신뢰성을 향상시킬 수 있는 탁월한 효과가 있다.As described above, according to the present invention, after the SOG is applied, a heat treatment step using plasma ions is performed to lower the water absorption of the film itself, thereby improving the reliability of the device.
Claims (5)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950012711A KR0172539B1 (en) | 1995-05-22 | 1995-05-22 | Method of forming s.o.g. in a semiconductor device |
| TW085105671A TW299467B (en) | 1995-05-22 | 1996-05-04 | |
| GB9610103A GB2301224B (en) | 1995-05-22 | 1996-05-15 | Method of forming a sog film in a semiconductor device |
| JP8124131A JPH08330301A (en) | 1995-05-22 | 1996-05-20 | Formation of sog film of semiconductor element |
| DE19620677A DE19620677B4 (en) | 1995-05-22 | 1996-05-22 | A method of forming a SOG film in a semiconductor device and a semiconductor device using a SOG film |
| CN96110029A CN1076869C (en) | 1995-05-22 | 1996-05-22 | Method of forming SOG film in semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950012711A KR0172539B1 (en) | 1995-05-22 | 1995-05-22 | Method of forming s.o.g. in a semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960043018A KR960043018A (en) | 1996-12-21 |
| KR0172539B1 true KR0172539B1 (en) | 1999-03-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950012711A KR0172539B1 (en) | 1995-05-22 | 1995-05-22 | Method of forming s.o.g. in a semiconductor device |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH08330301A (en) |
| KR (1) | KR0172539B1 (en) |
| CN (1) | CN1076869C (en) |
| DE (1) | DE19620677B4 (en) |
| GB (1) | GB2301224B (en) |
| TW (1) | TW299467B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR970052338A (en) * | 1995-12-23 | 1997-07-29 | 김주용 | Manufacturing method of semiconductor device |
| GB2322734A (en) * | 1997-02-27 | 1998-09-02 | Nec Corp | Semiconductor device and a method of manufacturing the same |
| KR100458081B1 (en) * | 1997-06-26 | 2005-02-23 | 주식회사 하이닉스반도체 | Method for forming via hole of semiconductor device to improve step coverage of metal layer |
| KR100459686B1 (en) * | 1997-06-27 | 2005-01-17 | 삼성전자주식회사 | Fabrication method of contact hole for semiconductor device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2823878B2 (en) * | 1989-03-09 | 1998-11-11 | 触媒化成工業株式会社 | Method for manufacturing semiconductor integrated circuit |
| US5270267A (en) * | 1989-05-31 | 1993-12-14 | Mitel Corporation | Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate |
| JPH04158519A (en) * | 1990-10-22 | 1992-06-01 | Seiko Epson Corp | Manufacture of semiconductor device |
| JP2913918B2 (en) * | 1991-08-26 | 1999-06-28 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| JPH0778816A (en) * | 1993-06-30 | 1995-03-20 | Kawasaki Steel Corp | Manufacture of semiconductor device |
-
1995
- 1995-05-22 KR KR1019950012711A patent/KR0172539B1/en not_active IP Right Cessation
-
1996
- 1996-05-04 TW TW085105671A patent/TW299467B/zh active
- 1996-05-15 GB GB9610103A patent/GB2301224B/en not_active Expired - Fee Related
- 1996-05-20 JP JP8124131A patent/JPH08330301A/en active Pending
- 1996-05-22 DE DE19620677A patent/DE19620677B4/en not_active Expired - Fee Related
- 1996-05-22 CN CN96110029A patent/CN1076869C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08330301A (en) | 1996-12-13 |
| CN1140898A (en) | 1997-01-22 |
| KR960043018A (en) | 1996-12-21 |
| DE19620677A1 (en) | 1996-11-28 |
| TW299467B (en) | 1997-03-01 |
| CN1076869C (en) | 2001-12-26 |
| GB9610103D0 (en) | 1996-07-24 |
| GB2301224A (en) | 1996-11-27 |
| DE19620677B4 (en) | 2007-06-14 |
| GB2301224B (en) | 1999-07-14 |
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