JPH08330301A - Formation of sog film of semiconductor element - Google Patents
Formation of sog film of semiconductor elementInfo
- Publication number
- JPH08330301A JPH08330301A JP8124131A JP12413196A JPH08330301A JP H08330301 A JPH08330301 A JP H08330301A JP 8124131 A JP8124131 A JP 8124131A JP 12413196 A JP12413196 A JP 12413196A JP H08330301 A JPH08330301 A JP H08330301A
- Authority
- JP
- Japan
- Prior art keywords
- film
- sog
- sog film
- forming
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子のＳＯ
Ｇ(Spin-On-Glass) 膜の形成方法に関するものであり、
ＳＯＧを塗布した後プラズマイオン(plasma ion)を利用
した後処理工程を実施し、膜自体の水分吸収力を低下さ
せることにより、素子の信頼性を高めるようにした半導
体素子のＳＯＧ膜の形成方法に関するものである。TECHNICAL FIELD The present invention relates to an SO for a semiconductor device.
The present invention relates to a method for forming a G (Spin-On-Glass) film,
A method for forming an SOG film of a semiconductor device by applying a post-treatment process using plasma ions after applying SOG to reduce the water absorption capacity of the film itself to improve the reliability of the device. It is about.
【０００２】[0002]
【従来の技術】一般的に、ＳＯＧは粘度が大きいため、
塗布後平坦度が優秀であり亀裂(crack) に対する耐久性
が大きいという長所がある。ＳＯＧは主に回転(spin)塗
布方法により塗布され、塗布後に硬化工程を経ると固体
化されるので、絶縁膜としての役割をすることもある。
このような理由で、半導体素子の製造工程ではＳＯＧ膜
を比較的段差が多い金属層間の絶縁及び平坦化の目的の
ため使用している。2. Description of the Related Art Generally, since SOG has a large viscosity,
It has the advantages of excellent flatness after application and high resistance to cracking. SOG is mainly applied by a spin coating method, and is solidified when a curing process is performed after the coating, so that it may serve as an insulating film.
For this reason, the SOG film is used in the manufacturing process of the semiconductor device for the purpose of insulating and flattening the metal layers having relatively many steps.
【０００３】[0003]
【発明が解決しようとする課題】ところが、ＳＯＧ膜は
膜自体の水分吸収力が強いため、その上部に形成される
金属層又は保護膜の破裂を誘発するか、コンタクトホー
ル内では下部の金属層を酸化して、金属配線自体の抵抗
を増加させることもある。そのようなことで、金属層間
の接触が不良になり断線が誘発され、素子の信頼性が低
下する。However, since the SOG film has a strong water absorbing ability, the SOG film induces the rupture of the metal layer or the protective film formed on the SOG film or the lower metal layer in the contact hole. May be oxidized to increase the resistance of the metal wiring itself. As a result, the contact between the metal layers becomes poor, disconnection is induced, and the reliability of the device deteriorates.
【０００４】素子の動作の際、ＳＯＧ膜は吸収した水分
を放出するので、放出された水分はトランジスターを構
成するゲート酸化膜及びシリコン基板の間、或いはフィ
ールド酸化膜及びシリコン基板の間で未結合されたシリ
コンボードに捕獲され、トランジスターのホットキャリ
ア(hot carrier) の劣化を生じ、フィールド反転(field
inversion) を起こして素子の電気的特性を低下させる
ことになる。During operation of the device, the SOG film releases the absorbed water, so the released water is not bonded between the gate oxide film and the silicon substrate forming the transistor or between the field oxide film and the silicon substrate. It is captured by a silicon board that is exposed to the surface and causes deterioration of the hot carrier of the transistor.
Inversion) will occur and the electrical characteristics of the device will deteriorate.
【０００５】従って、本発明はＳＯＧを塗布した後、プ
ラズマイオンを利用した後処理工程を実施して、膜自体
の水分吸収力を低下させることにより上記の短所を解消
できる半導体素子のＳＯＧ膜の形成方法を提供すること
にその目的がある。Therefore, according to the present invention, after the SOG is applied, a post-treatment process utilizing plasma ions is carried out to reduce the water absorption capacity of the film itself, thereby making it possible to solve the above disadvantages. Its purpose is to provide a method of forming.
【０００６】[0006]
【課題を解決するための手段】上記の目的を達成するた
めの本発明は、金属パターンが形成された第１層間絶縁
膜上に第２層間絶縁膜を形成した後、上部面全体にＳＯ
Ｇを塗布し、所定の温度で硬化してＳＯＧ膜を形成する
段階と、上記段階から、ＮＦ3 ガスを利用して生成した
プラズマイオンで上記ＳＯＧ膜を後処理する段階と、上
記段階から、所定の温度で２次熱処理をする段階とから
成ることを特徴とする。According to the present invention for achieving the above object, a second interlayer insulating film is formed on a first interlayer insulating film on which a metal pattern is formed, and then SO is formed on the entire upper surface.
G is applied and cured at a predetermined temperature to form an SOG film; from the above process, the SOG film is post-treated with plasma ions generated by using NF 3 gas; and from the above process, And a step of performing a secondary heat treatment at a predetermined temperature.
【０００７】[0007]
【発明の実施の形態】以下、添付した図面を参照して本
発明を詳細に説明する。図１（Ａ）乃至図１（Ｄ）は本
発明による半導体素子のＳＯＧ膜の形成方法を説明する
ための素子の断面図である。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. 1A to 1D are cross-sectional views of a device for explaining a method of forming an SOG film of a semiconductor device according to the present invention.
【０００８】図１（Ａ）は、所定の半導体素子製造工程
を経て形成された第１層間絶縁膜１上に、アルミニウム
（Ａｌ）のような導電物を蒸着して金属層２を形成し、
その上部にチタンナイトライド（ＴｉＮ）を蒸着して反
射防止層３を形成した後、所定のマスクを利用した写真
及びエッチング工程で、上記反射防止層３及び金属層２
を順次にパターニングした状態の断面図である。In FIG. 1A, a metal layer 2 is formed by depositing a conductive material such as aluminum (Al) on a first interlayer insulating film 1 formed through a predetermined semiconductor device manufacturing process.
Titanium nitride (TiN) is deposited on the top of the antireflection layer 3 to form the antireflection layer 3, and then the antireflection layer 3 and the metal layer 2 are formed by a photo and etching process using a predetermined mask.
FIG. 3 is a cross-sectional view showing a state in which the layers are sequentially patterned.
【０００９】図１（Ｂ）は、上部面全体に第２層間絶縁
膜４を形成した後、平坦化のためＳＯＧを塗布し２００
乃至４００℃の温度で１次熱処理をして硬化したＳＯＧ
膜５を形成した状態の断面図である。In FIG. 1B, after the second interlayer insulating film 4 is formed on the entire upper surface, SOG is applied for planarization 200
SOG cured by primary heat treatment at a temperature of ~ 400 ° C
It is a cross-sectional view of a state in which a film 5 is formed.
【００１０】図１（Ｃ）は、ＮＦ3 ガスを利用してプラ
ズマを生成しそのプラズマイオンの被爆(Ion bombardme
nt) により上記ＳＯＧ膜５が後処理される状態の断面図
であり、上記プラズマは、化学蒸気蒸着法(chemical va
por deposition;CVD) 装備又はプラズマ装備において生
成され、上記ＮＦ3 ガスは、０．５乃至５ＳＬＭ程度供
給される。更に、高周波（１３．５６ＭＨZ ）及び低周
波（３００乃至５００ＫＨZ ）電力を同時に印加してイ
オンの被爆による効果を増大させる。FIG. 1 (C) shows that NF 3 gas is used to generate plasma and the plasma ions are bombarded.
nt) is a cross-sectional view showing a state where the SOG film 5 is post-processed, wherein the plasma is a chemical vapor deposition method (chemical vapor deposition method).
Porous deposition (CVD) equipment or plasma equipment, and the NF 3 gas is supplied at about 0.5 to 5 SLM. Furthermore, high-frequency (13.56MH Z) and by applying a low frequency (300 to 500KH Z) power simultaneously increases the effects of exposure of ions.
【００１１】上記のようなプラズマ処理により得られる
効果について下記の如く説明する。上記プラズマにより
上記ＮＦ3 ガスは解離及びイオン化されＮ+ 、Ｆ+ 、Ｎ
Ｆｘ + 等のラジカル(radical) が生成され、このラジカ
ルが上記ＳＯＧ膜５に被爆され、このとき上記Ｎ+ 等の
イオンはプラズマにより損傷されたＳＯＧ膜内の未結合
アーム(dangling bond) の水分吸着の位置を減少させ、
表面にＳｉ−Ｎボンドを生成し、上記ＳＯＧ膜５表面に
酸化窒化膜(oxynitride)のような形態に作られるため上
記ＳＯＧ膜の水分吸収力が減少される。Obtained by the plasma treatment as described above
The effect will be described below. With the above plasma
Above NF3Gas is dissociated and ionized N+, F+, N
Fx +Radicals such as
Are exposed to the SOG film 5, and the N+Etc.
Ions are unbonded in SOG film damaged by plasma
The position of water adsorption on the arm (dangling bond) is reduced,
A Si-N bond is generated on the surface, and the SOG film 5 surface is formed.
Because it is made in the form of an oxynitride film,
The water absorption capacity of the SOG film is reduced.
【００１２】一方、Ｆ+ 又はＮＦｘ+ イオン等は、ＳＯ
Ｇ膜５内で、上記電気陰性度が大きいフッ素（Ｆ）によ
りＳｉ−ＯＨ結合をＳｉ−Ｆ結合に置換してＯＨイオン
を外部に放出する。置換されたＳｉ−Ｆ結合はＳｉ−Ｏ
の結合力を強化して大気中の水分（Ｈ2 Ｏ）の浸透にも
破壊されないようにするので、上記ＳＯＧ膜の水分吸収
力が効果的に減少する。On the other hand, F + or NFx + ions are
In the G film 5, fluorine (F) having a high electronegativity replaces the Si-OH bond with the Si-F bond to release OH ions to the outside. The replaced Si-F bond is Si-O.
Since the binding force of the SOG film is strengthened so that it is not destroyed even by permeation of water (H 2 O) in the atmosphere, the water absorption capacity of the SOG film is effectively reduced.
【００１３】図１（Ｄ）は、プラズマ処理されたＳＯＧ
膜５を４００乃至４５０℃の温度で２次熱処理する状態
の断面図である。プラズマ処理されたＳＯＧ膜５内に残
留した未結合状態のフッ素（Ｆ）イオンのみならず不完
全な結合状態のＯＨ、Ｈ2 Ｏ、ＣＨｘ、Ｆｘ等は熱処理
中に外部に放出される。FIG. 1D is a plasma-processed SOG.
FIG. 4 is a cross-sectional view showing a state where the film 5 is subjected to secondary heat treatment at a temperature of 400 to 450 ° C. Not only unbonded fluorine (F) ions remaining in the plasma-processed SOG film 5 but also incompletely bonded OH, H 2 O, CHx, Fx and the like are released to the outside during the heat treatment.
【００１４】[0014]
【発明の効果】上述した如く、本発明によると、ＳＯＧ
を塗布した後プラズマイオンを利用した後処理工程を実
施して、膜自体の水分吸収力を低下させることにより素
子の信頼性を向上させることができる卓越した効果があ
る。As described above, according to the present invention, the SOG
After coating, a post-treatment process using plasma ions is carried out to lower the water absorption capacity of the film itself, thereby improving the reliability of the device.
【図１】（Ａ）乃至（Ｄ）は、本発明による半導体素子
のＳＯＧ膜の形成方法を説明するための断面図である。1A to 1D are cross-sectional views illustrating a method of forming an SOG film of a semiconductor device according to the present invention.
１…第１層間絶縁膜 ２…金属層 ３…反射防止層 ４…第２層間絶縁膜 ５…ＳＯＧ膜 DESCRIPTION OF SYMBOLS 1 ... 1st interlayer insulation film 2 ... metal layer 3 ... antireflection layer 4 ... 2nd interlayer insulation film 5 ... SOG film
Claims (6)
て、 金属パターンが形成された第１層間絶縁膜上に、第２層
間絶縁膜を形成した後上部面全体にＳＯＧを塗布し、１
次熱処理により硬化してＳＯＧ膜を形成する段階と、 上記段階から、プラズマイオンで上記ＳＯＧ膜を後処理
する段階と、 上記段階から、２次熱処理をする段階から成ることを特
徴とする半導体素子のＳＯＧ膜の形成方法。1. A method of forming an SOG film of a semiconductor device, comprising forming a second interlayer insulating film on a first interlayer insulating film having a metal pattern, and then applying SOG to the entire upper surface of the first interlayer insulating film.
A semiconductor device comprising: a step of curing by a subsequent heat treatment to form an SOG film; a step of post-treating the SOG film with plasma ions from the above step; and a step of performing a secondary heat treatment from the above step. Method of forming SOG film of.
で実施されることを特徴とする半導体素子のＳＯＧ膜の
形成方法。2. The method for forming an SOG film of a semiconductor device according to claim 1, wherein the primary heat treatment curing step is performed at a temperature of 200 to 400 ° C.
ることを特徴とする半導体素子のＳＯＧ膜の形成方法。3. The method for forming an SOG film of a semiconductor device according to claim 1, wherein the plasma ions are generated by using NF 3 gas.
れるプラズマ装備内で生成されることを特徴とする半導
体素子のＳＯＧ膜の形成方法。4. The method for forming an SOG film of a semiconductor device according to claim 1, wherein the plasma is generated in a plasma equipment to which high frequency and low frequency powers are simultaneously applied.
ることを特徴とする半導体素子のＳＯＧ膜の形成方法。5. The method of forming an SOG film of a semiconductor device according to claim 1, wherein the NF 3 gas is supplied in an amount of 0.5 to 5 SLM.
施されることを特徴とする半導体素子のＳＯＧ膜の形成
方法。6. The method for forming an SOG film of a semiconductor device according to claim 1, wherein the secondary heat treatment step is performed at a temperature of 400 to 450 ° C.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950012711A KR0172539B1 (en) | 1995-05-22 | 1995-05-22 | Method of forming s.o.g. in a semiconductor device |
| KR95-12711 | 1995-05-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08330301A true JPH08330301A (en) | 1996-12-13 |
Family
ID=19415020
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8124131A Pending JPH08330301A (en) | 1995-05-22 | 1996-05-20 | Formation of sog film of semiconductor element |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH08330301A (en) |
| KR (1) | KR0172539B1 (en) |
| CN (1) | CN1076869C (en) |
| DE (1) | DE19620677B4 (en) |
| GB (1) | GB2301224B (en) |
| TW (1) | TW299467B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR970052338A (en) * | 1995-12-23 | 1997-07-29 | 김주용 | Manufacturing method of semiconductor device |
| GB2322734A (en) * | 1997-02-27 | 1998-09-02 | Nec Corp | Semiconductor device and a method of manufacturing the same |
| KR100458081B1 (en) * | 1997-06-26 | 2005-02-23 | 주식회사 하이닉스반도체 | Method for forming via hole of semiconductor device to improve step coverage of metal layer |
| KR100459686B1 (en) * | 1997-06-27 | 2005-01-17 | 삼성전자주식회사 | Fabrication method of contact hole for semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02237030A (en) * | 1989-03-09 | 1990-09-19 | Catalysts & Chem Ind Co Ltd | Manufacture of semiconductor integrated circuit |
| JPH0778816A (en) * | 1993-06-30 | 1995-03-20 | Kawasaki Steel Corp | Manufacture of semiconductor device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5270267A (en) * | 1989-05-31 | 1993-12-14 | Mitel Corporation | Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate |
| JPH04158519A (en) * | 1990-10-22 | 1992-06-01 | Seiko Epson Corp | Manufacture of semiconductor device |
| JP2913918B2 (en) * | 1991-08-26 | 1999-06-28 | 日本電気株式会社 | Method for manufacturing semiconductor device |
-
1995
- 1995-05-22 KR KR1019950012711A patent/KR0172539B1/en not_active IP Right Cessation
-
1996
- 1996-05-04 TW TW085105671A patent/TW299467B/zh active
- 1996-05-15 GB GB9610103A patent/GB2301224B/en not_active Expired - Fee Related
- 1996-05-20 JP JP8124131A patent/JPH08330301A/en active Pending
- 1996-05-22 CN CN96110029A patent/CN1076869C/en not_active Expired - Fee Related
- 1996-05-22 DE DE19620677A patent/DE19620677B4/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02237030A (en) * | 1989-03-09 | 1990-09-19 | Catalysts & Chem Ind Co Ltd | Manufacture of semiconductor integrated circuit |
| JPH0778816A (en) * | 1993-06-30 | 1995-03-20 | Kawasaki Steel Corp | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW299467B (en) | 1997-03-01 |
| CN1076869C (en) | 2001-12-26 |
| GB2301224A (en) | 1996-11-27 |
| KR960043018A (en) | 1996-12-21 |
| DE19620677A1 (en) | 1996-11-28 |
| GB2301224B (en) | 1999-07-14 |
| KR0172539B1 (en) | 1999-03-30 |
| CN1140898A (en) | 1997-01-22 |
| DE19620677B4 (en) | 2007-06-14 |
| GB9610103D0 (en) | 1996-07-24 |
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