KR960042730A - 반도체기억장치 - Google Patents

반도체기억장치 Download PDF

Info

Publication number
KR960042730A
KR960042730A KR1019960017604A KR19960017604A KR960042730A KR 960042730 A KR960042730 A KR 960042730A KR 1019960017604 A KR1019960017604 A KR 1019960017604A KR 19960017604 A KR19960017604 A KR 19960017604A KR 960042730 A KR960042730 A KR 960042730A
Authority
KR
South Korea
Prior art keywords
signal
address
data
write
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR1019960017604A
Other languages
English (en)
Korean (ko)
Inventor
세이고 유쿠타케
킨야 미쯔모토
타카시 아키오카
마사히로 이와무라
노보루 아카야마
Original Assignee
카나이 쯔또무
가부시기가이샤 히다찌세이사구쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 카나이 쯔또무, 가부시기가이샤 히다찌세이사구쇼 filed Critical 카나이 쯔또무
Publication of KR960042730A publication Critical patent/KR960042730A/ko
Priority to KR1020040111063A priority Critical patent/KR100574108B1/ko
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/105—Aspects related to pads, pins or terminals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2218—Late write

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Memory System (AREA)
KR1019960017604A 1995-05-24 1996-05-23 반도체기억장치 Abandoned KR960042730A (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020040111063A KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-124709 1995-05-24
JP07124709A JP3102301B2 (ja) 1995-05-24 1995-05-24 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020040111063A Division KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치

Publications (1)

Publication Number Publication Date
KR960042730A true KR960042730A (ko) 1996-12-21

Family

ID=14892169

Family Applications (6)

Application Number Title Priority Date Filing Date
KR1019960017604A Abandoned KR960042730A (ko) 1995-05-24 1996-05-23 반도체기억장치
KR1020040111063A Expired - Lifetime KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치
KR1020050097450A Expired - Fee Related KR100783049B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020050097447A Expired - Lifetime KR100694440B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020070056051A Expired - Lifetime KR100915554B1 (ko) 1995-05-24 2007-06-08 반도체기억장치
KR1020090006544A Expired - Fee Related KR100945968B1 (ko) 1995-05-24 2009-01-28 반도체기억장치

Family Applications After (5)

Application Number Title Priority Date Filing Date
KR1020040111063A Expired - Lifetime KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치
KR1020050097450A Expired - Fee Related KR100783049B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020050097447A Expired - Lifetime KR100694440B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020070056051A Expired - Lifetime KR100915554B1 (ko) 1995-05-24 2007-06-08 반도체기억장치
KR1020090006544A Expired - Fee Related KR100945968B1 (ko) 1995-05-24 2009-01-28 반도체기억장치

Country Status (4)

Country Link
US (1) US5761150A (https=)
JP (1) JP3102301B2 (https=)
KR (6) KR960042730A (https=)
TW (1) TW317635B (https=)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838631A (en) 1996-04-19 1998-11-17 Integrated Device Technology, Inc. Fully synchronous pipelined ram
US6320785B1 (en) * 1996-07-10 2001-11-20 Hitachi, Ltd. Nonvolatile semiconductor memory device and data writing method therefor
CN1130575C (zh) 1997-05-16 2003-12-10 保谷株式会社 具有抗反射膜的塑料光学器件以及用来使抗反射膜的厚度均一的机构
US6075730A (en) * 1997-10-10 2000-06-13 Rambus Incorporated High performance cost optimized memory with delayed memory writes
US6115320A (en) 1998-02-23 2000-09-05 Integrated Device Technology, Inc. Separate byte control on fully synchronous pipelined SRAM
JP4107716B2 (ja) * 1998-06-16 2008-06-25 株式会社ルネサステクノロジ Ｆｉｆｏ型記憶装置
KR100270959B1 (ko) * 1998-07-07 2000-11-01 윤종용 반도체 메모리 장치
KR100283470B1 (ko) * 1998-12-09 2001-03-02 윤종용 반도체 메모리 장치의 어드레스 발생회로
US7069406B2 (en) * 1999-07-02 2006-06-27 Integrated Device Technology, Inc. Double data rate synchronous SRAM with 100% bus utilization
TW522399B (en) * 1999-12-08 2003-03-01 Hitachi Ltd Semiconductor device
US6501698B1 (en) * 2000-11-01 2002-12-31 Enhanced Memory Systems, Inc. Structure and method for hiding DRAM cycle time behind a burst access
US7403446B1 (en) * 2005-09-27 2008-07-22 Cypress Semiconductor Corporation Single late-write for standard synchronous SRAMs
WO2008002645A2 (en) * 2006-06-28 2008-01-03 Cypress Semiconductor Corporation Memory device and method for selective write based on input data value
KR101033464B1 (ko) 2008-12-22 2011-05-09 주식회사 하이닉스반도체 반도체 집적 회로
US8644088B2 (en) 2010-10-28 2014-02-04 Hynix Semiconductor Inc. Semiconductor memory device and semiconductor system including the same
US20180189374A1 (en) * 2016-12-30 2018-07-05 Arrow Devices Private Limited System and method for fast reading of signal databases

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5172379A (en) * 1989-02-24 1992-12-15 Data General Corporation High performance memory system
US5258952A (en) * 1990-12-14 1993-11-02 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with separate time-out control for read and write operations
JP3179788B2 (ja) * 1991-01-17 2001-06-25 三菱電機株式会社 半導体記憶装置
US5587961A (en) * 1996-02-16 1996-12-24 Micron Technology, Inc. Synchronous memory allowing early read command in write to read transitions
JP2005007598A (ja) * 2003-06-16 2005-01-13 Aoki Technical Laboratory Inc 細口筒状容器の射出延伸ブロー成形方法及び容器

Also Published As

Publication number Publication date
KR100945968B1 (ko) 2010-03-09
KR20070108331A (ko) 2007-11-09
JPH08321180A (ja) 1996-12-03
US5761150A (en) 1998-06-02
KR100783049B1 (ko) 2007-12-07
KR100574108B1 (ko) 2006-04-26
KR20090028585A (ko) 2009-03-18
JP3102301B2 (ja) 2000-10-23
KR20070108293A (ko) 2007-11-09
KR100915554B1 (ko) 2009-09-03
KR100694440B1 (ko) 2007-03-12
TW317635B (https=) 1997-10-11

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19960523

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20010503

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 19960523

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20030724

Patent event code: PE09021S01D

A107 Divisional application of patent
PA0107 Divisional application

Comment text: Divisional Application of Patent

Patent event date: 20041223

Patent event code: PA01071R01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20050330

NORF Unpaid initial registration fee
PC1904 Unpaid initial registration fee