KR20090028585A - 반도체기억장치 - Google Patents

반도체기억장치

Info

Publication number
KR20090028585A
KR20090028585A KR1020090006544A KR20090006544A KR20090028585A KR 20090028585 A KR20090028585 A KR 20090028585A KR 1020090006544 A KR1020090006544 A KR 1020090006544A KR 20090006544 A KR20090006544 A KR 20090006544A KR 20090028585 A KR20090028585 A KR 20090028585A
Authority
KR
South Korea
Prior art keywords
address
unit
retaining
semiconductor memory
retaining unit
Prior art date
Application number
KR1020090006544A
Other languages
English (en)
Other versions
KR100945968B1 (ko
Inventor
세이고 유쿠타케
킨야 미쯔모토
타카시 아키오카
마사히로 이와무라
노보루 아키야마
Original Assignee
가부시끼가이샤 르네사스 테크놀로지
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 르네사스 테크놀로지 filed Critical 가부시끼가이샤 르네사스 테크놀로지
Publication of KR20090028585A publication Critical patent/KR20090028585A/ko
Application granted granted Critical
Publication of KR100945968B1 publication Critical patent/KR100945968B1/ko

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/06Address interface arrangements, e.g. address buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/105Aspects related to pads, pins or terminals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2218Late write

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Memory System (AREA)
KR1020090006544A 1995-05-24 2009-01-28 반도체기억장치 KR100945968B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP07124709A JP3102301B2 (ja) 1995-05-24 1995-05-24 半導体記憶装置
JPJP-P-1995-124709 1995-05-24

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
KR1020070056051A Division KR100915554B1 (ko) 1995-05-24 2007-06-08 반도체기억장치

Publications (2)

Publication Number Publication Date
KR20090028585A true KR20090028585A (ko) 2009-03-18
KR100945968B1 KR100945968B1 (ko) 2010-03-09

Family

ID=14892169

Family Applications (6)

Application Number Title Priority Date Filing Date
KR1019960017604A KR960042730A (ko) 1995-05-24 1996-05-23 반도체기억장치
KR1020040111063A KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치
KR1020050097450A KR100783049B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020050097447A KR100694440B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020070056051A KR100915554B1 (ko) 1995-05-24 2007-06-08 반도체기억장치
KR1020090006544A KR100945968B1 (ko) 1995-05-24 2009-01-28 반도체기억장치

Family Applications Before (5)

Application Number Title Priority Date Filing Date
KR1019960017604A KR960042730A (ko) 1995-05-24 1996-05-23 반도체기억장치
KR1020040111063A KR100574108B1 (ko) 1995-05-24 2004-12-23 반도체기억장치
KR1020050097450A KR100783049B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020050097447A KR100694440B1 (ko) 1995-05-24 2005-10-17 반도체기억장치
KR1020070056051A KR100915554B1 (ko) 1995-05-24 2007-06-08 반도체기억장치

Country Status (4)

Country Link
US (1) US5761150A (ko)
JP (1) JP3102301B2 (ko)
KR (6) KR960042730A (ko)
TW (1) TW317635B (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838631A (en) 1996-04-19 1998-11-17 Integrated Device Technology, Inc. Fully synchronous pipelined ram
US6320785B1 (en) * 1996-07-10 2001-11-20 Hitachi, Ltd. Nonvolatile semiconductor memory device and data writing method therefor
CN1130575C (zh) 1997-05-16 2003-12-10 保谷株式会社 具有抗反射膜的塑料光学器件以及用来使抗反射膜的厚度均一的机构
US6075730A (en) * 1997-10-10 2000-06-13 Rambus Incorporated High performance cost optimized memory with delayed memory writes
US6115320A (en) 1998-02-23 2000-09-05 Integrated Device Technology, Inc. Separate byte control on fully synchronous pipelined SRAM
JP4107716B2 (ja) * 1998-06-16 2008-06-25 株式会社ルネサステクノロジ Fifo型記憶装置
KR100270959B1 (ko) * 1998-07-07 2000-11-01 윤종용 반도체 메모리 장치
KR100283470B1 (ko) * 1998-12-09 2001-03-02 윤종용 반도체 메모리 장치의 어드레스 발생회로
US7069406B2 (en) * 1999-07-02 2006-06-27 Integrated Device Technology, Inc. Double data rate synchronous SRAM with 100% bus utilization
TW522399B (en) * 1999-12-08 2003-03-01 Hitachi Ltd Semiconductor device
US6501698B1 (en) * 2000-11-01 2002-12-31 Enhanced Memory Systems, Inc. Structure and method for hiding DRAM cycle time behind a burst access
US7403446B1 (en) * 2005-09-27 2008-07-22 Cypress Semiconductor Corporation Single late-write for standard synchronous SRAMs
WO2008002645A2 (en) * 2006-06-28 2008-01-03 Cypress Semiconductor Corporation Memory device and method for selective write based on input data value
KR101033464B1 (ko) 2008-12-22 2011-05-09 주식회사 하이닉스반도체 반도체 집적 회로
US8644088B2 (en) 2010-10-28 2014-02-04 Hynix Semiconductor Inc. Semiconductor memory device and semiconductor system including the same
US20180189374A1 (en) * 2016-12-30 2018-07-05 Arrow Devices Private Limited System and method for fast reading of signal databases

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5172379A (en) * 1989-02-24 1992-12-15 Data General Corporation High performance memory system
US5258952A (en) * 1990-12-14 1993-11-02 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with separate time-out control for read and write operations
JP3179788B2 (ja) * 1991-01-17 2001-06-25 三菱電機株式会社 半導体記憶装置
US5587961A (en) * 1996-02-16 1996-12-24 Micron Technology, Inc. Synchronous memory allowing early read command in write to read transitions
JP2005007598A (ja) * 2003-06-16 2005-01-13 Aoki Technical Laboratory Inc 細口筒状容器の射出延伸ブロー成形方法及び容器

Also Published As

Publication number Publication date
KR960042730A (ko) 1996-12-21
KR100945968B1 (ko) 2010-03-09
TW317635B (ko) 1997-10-11
KR100783049B1 (ko) 2007-12-07
JP3102301B2 (ja) 2000-10-23
KR100574108B1 (ko) 2006-04-26
KR100915554B1 (ko) 2009-09-03
KR100694440B1 (ko) 2007-03-12
KR20070108331A (ko) 2007-11-09
JPH08321180A (ja) 1996-12-03
KR20070108293A (ko) 2007-11-09
US5761150A (en) 1998-06-02

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Legal Events

Date Code Title Description
A107 Divisional application of patent
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee