JPS6488668A - Bus control system - Google Patents

Bus control system

Info

Publication number
JPS6488668A
JPS6488668A JP24544187A JP24544187A JPS6488668A JP S6488668 A JPS6488668 A JP S6488668A JP 24544187 A JP24544187 A JP 24544187A JP 24544187 A JP24544187 A JP 24544187A JP S6488668 A JPS6488668 A JP S6488668A
Authority
JP
Japan
Prior art keywords
bus
obtaining request
writing
reading
request signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24544187A
Other languages
Japanese (ja)
Inventor
Morishige Kaneshiro
Junichi Kihara
Yukio Urushibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24544187A priority Critical patent/JPS6488668A/en
Publication of JPS6488668A publication Critical patent/JPS6488668A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To shorten the time of the bus cycle of the bus of a split control system and to attain the high speed of the bus by preparing two types of bus obtaining request signals for reading and writing. CONSTITUTION:The two types of the reading PRQ and the writing WRQ are disposed as the bus obtaining request signal outputted for requesting to obtain the bus from devices 22A-22C connected to the split control bus 10. In a cycle where a response signal RSP for returning read data from a memory device is outputted, the writing bus obtaining request signal WRQ is neglected to execute the competition of the bus between reading bus obtaining request signal RRQ output devices. Thereby, the propriety for obtaining the bus 10 can be decided to attain the high speed of the bus 10.
JP24544187A 1987-09-29 1987-09-29 Bus control system Pending JPS6488668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24544187A JPS6488668A (en) 1987-09-29 1987-09-29 Bus control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24544187A JPS6488668A (en) 1987-09-29 1987-09-29 Bus control system

Publications (1)

Publication Number Publication Date
JPS6488668A true JPS6488668A (en) 1989-04-03

Family

ID=17133709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24544187A Pending JPS6488668A (en) 1987-09-29 1987-09-29 Bus control system

Country Status (1)

Country Link
JP (1) JPS6488668A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03222543A (en) * 1990-01-29 1991-10-01 Nippon Telegr & Teleph Corp <Ntt> Bus transfer reply system
JPH08249274A (en) * 1995-03-15 1996-09-27 Kofu Nippon Denki Kk Data transfer device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03222543A (en) * 1990-01-29 1991-10-01 Nippon Telegr & Teleph Corp <Ntt> Bus transfer reply system
JPH08249274A (en) * 1995-03-15 1996-09-27 Kofu Nippon Denki Kk Data transfer device

Similar Documents

Publication Publication Date Title
EP0092976A3 (en) Memory writing control apparatus
WO1987004823A1 (en) Apparatus and method for providing a cache memory unit with a write operation utilizing two system clock cycles
JPS6488668A (en) Bus control system
EP0265913A3 (en) Semi-custom-made integrated circuit device
AU590794B2 (en) Method and circuit arrangement for the transmission of data signals between control devices connected to one another via a loop system
JPS5733472A (en) Memory access control system
JPS6429951A (en) Storage system
JPS57127259A (en) System for high-speed data transfer
JPS5769432A (en) Information processor
JPS6439166A (en) Image processing system
JPS56168256A (en) Data processor
JPS6461133A (en) Channel board control circuit
JPS57176464A (en) Data transfer system
JPS6415848A (en) Bus tracer
JPH0166697U (en)
JPS5721146A (en) Data transmission system
JPS5567856A (en) Memory device
JPS5657134A (en) Computer device
JPS5478643A (en) Read/write processing method for input/output device
JPS54133042A (en) Direct memory access system in multi processor
JPS57191748A (en) Buffer memory controlling system
JPS5654678A (en) Memory control system
JPS6442757A (en) Input and output interface
JPS54146532A (en) Memory device
JPS56111932A (en) High-speed input/output controller