JPS5769432A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5769432A
JPS5769432A JP55142904A JP14290480A JPS5769432A JP S5769432 A JPS5769432 A JP S5769432A JP 55142904 A JP55142904 A JP 55142904A JP 14290480 A JP14290480 A JP 14290480A JP S5769432 A JPS5769432 A JP S5769432A
Authority
JP
Japan
Prior art keywords
cycles
microprocessor
period
clock
internal processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55142904A
Other languages
Japanese (ja)
Inventor
Rikio Awabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55142904A priority Critical patent/JPS5769432A/en
Publication of JPS5769432A publication Critical patent/JPS5769432A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To shorten the period of a clock in confirmity to the internal processing speed of a microprocessor by switching and controlling the period of the clock between microprocessor internal processing cycles and external interface control cycles. CONSTITUTION:In machine cycles including memory reading operation, a microprocessor 10 outputs a memory address to an ADRESS line in a basic cycles T1 and, while holding a signal RD at a ''0'' in the next basic cycle T2, permits a clock control part 11 by a control signal CONTROL to change the period of a clock CLK' over to a tC2. Then, it is confirmed that a signal READY is a ''1'' and the processor enters into the next basic cycle T3 to read memory readout data onto a line DATA. Therefore, it is unnecessary to consider the cycle time, etc., of a memory as to the period tC2 of the clock CLK', and they can be shortened sufficiently in conformity to the internal processing speed of the microprocessor 10, shorten the machime cycles.
JP55142904A 1980-10-15 1980-10-15 Information processor Pending JPS5769432A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55142904A JPS5769432A (en) 1980-10-15 1980-10-15 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55142904A JPS5769432A (en) 1980-10-15 1980-10-15 Information processor

Publications (1)

Publication Number Publication Date
JPS5769432A true JPS5769432A (en) 1982-04-28

Family

ID=15326307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55142904A Pending JPS5769432A (en) 1980-10-15 1980-10-15 Information processor

Country Status (1)

Country Link
JP (1) JPS5769432A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5025372A (en) * 1987-09-17 1991-06-18 Meridian Enterprises, Inc. System and method for administration of incentive award program through use of credit
JPH0573363A (en) * 1991-09-17 1993-03-26 Honda Motor Co Ltd Watchdog timer device
US5689100A (en) * 1995-03-21 1997-11-18 Martiz, Inc. Debit card system and method for implementing incentive award program

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5025372A (en) * 1987-09-17 1991-06-18 Meridian Enterprises, Inc. System and method for administration of incentive award program through use of credit
JPH0573363A (en) * 1991-09-17 1993-03-26 Honda Motor Co Ltd Watchdog timer device
US5689100A (en) * 1995-03-21 1997-11-18 Martiz, Inc. Debit card system and method for implementing incentive award program

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