JPS54133042A - Direct memory access system in multi processor - Google Patents
Direct memory access system in multi processorInfo
- Publication number
- JPS54133042A JPS54133042A JP4039678A JP4039678A JPS54133042A JP S54133042 A JPS54133042 A JP S54133042A JP 4039678 A JP4039678 A JP 4039678A JP 4039678 A JP4039678 A JP 4039678A JP S54133042 A JPS54133042 A JP S54133042A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- bus
- data channel
- signal
- memory access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To enable the external input and output unit to peform directly data transfer with individulal memory without through processor, by connecting the memory bus and common bus of individual memory with the bus connection section.
CONSTITUTION: The data channel 6 delivers the interruption signal to an arbitrary processor 3 and receives the interruption request enable signal and the direct memory access information. The data channel 6 outputs the memory request signal to the individual memory 1 to be accessed. When the memory request enable signal is made to the data channel 6 by the individual memory 1, with the bus selection signal and the memory request enable signal, the common bus 4 and the memory bus are connected via the bus connection section 15. That is, while the data channel 6 controls the bus selection, it performs data transfer with the direct memory access as if the individual memory 1 were connected to the common bus 4. As a result, the direct memory access between the external input and output unit 8 and the individual memory 1 is made possible, and the prosessing time requried for the data transfer of each processor can be reduced.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53040396A JPS5836380B2 (en) | 1978-04-07 | 1978-04-07 | Direct memory access method in multiprocessor systems |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53040396A JPS5836380B2 (en) | 1978-04-07 | 1978-04-07 | Direct memory access method in multiprocessor systems |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54133042A true JPS54133042A (en) | 1979-10-16 |
JPS5836380B2 JPS5836380B2 (en) | 1983-08-09 |
Family
ID=12579498
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53040396A Expired JPS5836380B2 (en) | 1978-04-07 | 1978-04-07 | Direct memory access method in multiprocessor systems |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5836380B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60151769A (en) * | 1984-01-19 | 1985-08-09 | Fujitsu Ltd | Bus controlling system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5215242A (en) * | 1975-07-28 | 1977-02-04 | Nec Corp | Mutual communication system among processors |
-
1978
- 1978-04-07 JP JP53040396A patent/JPS5836380B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5215242A (en) * | 1975-07-28 | 1977-02-04 | Nec Corp | Mutual communication system among processors |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60151769A (en) * | 1984-01-19 | 1985-08-09 | Fujitsu Ltd | Bus controlling system |
Also Published As
Publication number | Publication date |
---|---|
JPS5836380B2 (en) | 1983-08-09 |
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