JPS55150032A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS55150032A
JPS55150032A JP5799179A JP5799179A JPS55150032A JP S55150032 A JPS55150032 A JP S55150032A JP 5799179 A JP5799179 A JP 5799179A JP 5799179 A JP5799179 A JP 5799179A JP S55150032 A JPS55150032 A JP S55150032A
Authority
JP
Japan
Prior art keywords
input
output
data
address
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5799179A
Other languages
Japanese (ja)
Inventor
Yoshiharu Kamio
Hitoshi Shirai
Yoshikazu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5799179A priority Critical patent/JPS55150032A/en
Publication of JPS55150032A publication Critical patent/JPS55150032A/en
Pending legal-status Critical Current

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  • Bus Control (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE: To omit the process given by the central processor by adding a simple circuit to the input/output control unit, thus facilitating the data transfer within the main memory.
CONSTITUTION: CPU3 connected to common bus line 2 plus main memory 4 are provided to information process system 1, and then input/output control unit 6 is installed in order to perform the control of the data transfer between input/output units 5 and 4 like the typewriters and the like as well as the transfer control via other address within the unit. Then direct memory access control circuit 7 plus input/ output data control circuit 8 are provided to unit 6, and the access of the output data transmitted by circuit 7 plus the address of the input data to be transferred are designated to give the independent access to the input and output sides each. At the same time, the output data transferred to unit 6 is returned at circuit 8 in the form of the data to be transmitted, and the desired data within memory 4 which is designated as the output address is designated as the input address to be then transferred to the necessary address within memory 4.
COPYRIGHT: (C)1980,JPO&Japio
JP5799179A 1979-05-14 1979-05-14 Data transfer system Pending JPS55150032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5799179A JPS55150032A (en) 1979-05-14 1979-05-14 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5799179A JPS55150032A (en) 1979-05-14 1979-05-14 Data transfer system

Publications (1)

Publication Number Publication Date
JPS55150032A true JPS55150032A (en) 1980-11-21

Family

ID=13071466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5799179A Pending JPS55150032A (en) 1979-05-14 1979-05-14 Data transfer system

Country Status (1)

Country Link
JP (1) JPS55150032A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115677A (en) * 1981-12-28 1983-07-09 Fujitsu Ltd Dma data transfer system for transfer in the same memory
JPS60110067A (en) * 1983-11-21 1985-06-15 Mitsubishi Electric Corp Simple memory data transfer device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115677A (en) * 1981-12-28 1983-07-09 Fujitsu Ltd Dma data transfer system for transfer in the same memory
JPS60110067A (en) * 1983-11-21 1985-06-15 Mitsubishi Electric Corp Simple memory data transfer device
JPS6337418B2 (en) * 1983-11-21 1988-07-25 Mitsubishi Electric Corp

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