JPS5617450A - Data collection system - Google Patents

Data collection system

Info

Publication number
JPS5617450A
JPS5617450A JP9253179A JP9253179A JPS5617450A JP S5617450 A JPS5617450 A JP S5617450A JP 9253179 A JP9253179 A JP 9253179A JP 9253179 A JP9253179 A JP 9253179A JP S5617450 A JPS5617450 A JP S5617450A
Authority
JP
Japan
Prior art keywords
data
address
stacker
current
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9253179A
Other languages
Japanese (ja)
Inventor
Yuji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9253179A priority Critical patent/JPS5617450A/en
Publication of JPS5617450A publication Critical patent/JPS5617450A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To collect data without modifying a microprogram by executing a main microprogram on the basis of the contents of the current address after executing a data-collection program routine by interruption processing.
CONSTITUTION: Once data-collection request signal S1 is input to stacker control circuit 3, data D1 from current-address register 4 are stored in stacker 2 and the initial address of a preset data-collecting routine is output from stacker 2 as data D2. Output address ADD from address change-over circuit 5 is input to a fixed unit and also to +1 circuit 6. After the data-collecting routine is executed by interruption processing, the current address stored in stacker 2 is read out and, after being increased by one, stored in current-address register 4, so that the next step of the main microprogram will be executed.
COPYRIGHT: (C)1981,JPO&Japio
JP9253179A 1979-07-23 1979-07-23 Data collection system Pending JPS5617450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9253179A JPS5617450A (en) 1979-07-23 1979-07-23 Data collection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9253179A JPS5617450A (en) 1979-07-23 1979-07-23 Data collection system

Publications (1)

Publication Number Publication Date
JPS5617450A true JPS5617450A (en) 1981-02-19

Family

ID=14056932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9253179A Pending JPS5617450A (en) 1979-07-23 1979-07-23 Data collection system

Country Status (1)

Country Link
JP (1) JPS5617450A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6031659A (en) * 1983-07-29 1985-02-18 Nec Corp Microprogram control type data processor
JPS61103255A (en) * 1984-10-26 1986-05-21 Nec Corp Data collection system in case of fault
JPS61175730A (en) * 1985-01-30 1986-08-07 Fujitsu Ltd Interruption control system
JPH05189229A (en) * 1992-01-09 1993-07-30 Mitsubishi Electric Corp Microprocessor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6031659A (en) * 1983-07-29 1985-02-18 Nec Corp Microprogram control type data processor
JPS61103255A (en) * 1984-10-26 1986-05-21 Nec Corp Data collection system in case of fault
JPS61175730A (en) * 1985-01-30 1986-08-07 Fujitsu Ltd Interruption control system
JPH05189229A (en) * 1992-01-09 1993-07-30 Mitsubishi Electric Corp Microprocessor

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