JPS5621251A - Retrial control system - Google Patents

Retrial control system

Info

Publication number
JPS5621251A
JPS5621251A JP9703779A JP9703779A JPS5621251A JP S5621251 A JPS5621251 A JP S5621251A JP 9703779 A JP9703779 A JP 9703779A JP 9703779 A JP9703779 A JP 9703779A JP S5621251 A JPS5621251 A JP S5621251A
Authority
JP
Japan
Prior art keywords
instruction
counter
stored
content
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9703779A
Other languages
Japanese (ja)
Other versions
JPS6012656B2 (en
Inventor
Yuji Oinaga
Kazuyuki Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54097037A priority Critical patent/JPS6012656B2/en
Publication of JPS5621251A publication Critical patent/JPS5621251A/en
Publication of JPS6012656B2 publication Critical patent/JPS6012656B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Retry When Errors Occur (AREA)

Abstract

PURPOSE: To increase the chance of retrial to the instruction of SS type, by storing the status of instruction progress at error detection and formally executing the instruction when this stored status is in agreement with the progress information of instruction tried again.
CONSTITUTION: When an error is detected, the content of the counter 1 is copied with the retrial counter 2 and stored. Simultaneously, FF4, 5 are set and the storage suppression signal from the AND circuit 6 is on. Further, the instruction counter is made by -1, and the same MOVE instruction is again fetched and executed. Further, every time the stored data is fed to the storage buffer, the content of the counter 1 is renewed, but since the storage suppression signal is on for the data in the storage buffer, it is not fed to the main memory and the data is not stored really. But, when the content of the execution counter 1 is in agreement with the content of the retrial counter 2, the storage suppression signal is off and the data is stored in the main memory actually.
COPYRIGHT: (C)1981,JPO&Japio
JP54097037A 1979-07-30 1979-07-30 Retry control method Expired JPS6012656B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54097037A JPS6012656B2 (en) 1979-07-30 1979-07-30 Retry control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54097037A JPS6012656B2 (en) 1979-07-30 1979-07-30 Retry control method

Publications (2)

Publication Number Publication Date
JPS5621251A true JPS5621251A (en) 1981-02-27
JPS6012656B2 JPS6012656B2 (en) 1985-04-02

Family

ID=14181338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54097037A Expired JPS6012656B2 (en) 1979-07-30 1979-07-30 Retry control method

Country Status (1)

Country Link
JP (1) JPS6012656B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57150045A (en) * 1981-03-12 1982-09-16 Hitachi Ltd Control system of instruction retrial
EP0412267A2 (en) * 1989-08-11 1991-02-13 International Business Machines Corporation Asynchronous high-speed data interface

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57150045A (en) * 1981-03-12 1982-09-16 Hitachi Ltd Control system of instruction retrial
JPS6130298B2 (en) * 1981-03-12 1986-07-12 Hitachi Ltd
EP0412267A2 (en) * 1989-08-11 1991-02-13 International Business Machines Corporation Asynchronous high-speed data interface

Also Published As

Publication number Publication date
JPS6012656B2 (en) 1985-04-02

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