JPS55140949A - Information processor - Google Patents

Information processor

Info

Publication number
JPS55140949A
JPS55140949A JP4774479A JP4774479A JPS55140949A JP S55140949 A JPS55140949 A JP S55140949A JP 4774479 A JP4774479 A JP 4774479A JP 4774479 A JP4774479 A JP 4774479A JP S55140949 A JPS55140949 A JP S55140949A
Authority
JP
Japan
Prior art keywords
order
calculation
alteration
decoder
indicator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4774479A
Other languages
Japanese (ja)
Inventor
Kazuhiko Maekawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4774479A priority Critical patent/JPS55140949A/en
Publication of JPS55140949A publication Critical patent/JPS55140949A/en
Pending legal-status Critical Current

Links

Landscapes

  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To facilitate the easy execution of the branch order by adding the control circuit by the slight amount of hardware to the adder for order counter alteration and the decoder each and thus peforming the calculation of the relative address with no reduction of the performance caused by the branch order.
CONSTITUTION: The data sent back from memory device 1 by the request given from advanced control part 2a of CPU2 is set to order register 2a3 via order word buffer 2a1. And the necessity for calculation of the relative address is decoded through decoder 2a4. At the same time, branch order indicator 2a8 is set in the case of the branch order, and then reset when the alteration is given to order counter 2b1 of operation execution part 2b. Then the input of address calculation adder input switching circuit 2a5 is selected by the outputs of decoder 2a4 and indicator 2a8. And the outputs of order counter alteration adder 2b2 and general-purpose base register 2b7 are selected when indicator 2a8 is set and not set respectively. Then the calculation of the relative address is carried out at part 2b.
COPYRIGHT: (C)1980,JPO&Japio
JP4774479A 1979-04-18 1979-04-18 Information processor Pending JPS55140949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4774479A JPS55140949A (en) 1979-04-18 1979-04-18 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4774479A JPS55140949A (en) 1979-04-18 1979-04-18 Information processor

Publications (1)

Publication Number Publication Date
JPS55140949A true JPS55140949A (en) 1980-11-04

Family

ID=12783849

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4774479A Pending JPS55140949A (en) 1979-04-18 1979-04-18 Information processor

Country Status (1)

Country Link
JP (1) JPS55140949A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154547A (en) * 1983-02-22 1984-09-03 Hitachi Ltd Instruction readout control system
JPH06301532A (en) * 1993-04-19 1994-10-28 Kawasaki Steel Corp Microprocessor unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154547A (en) * 1983-02-22 1984-09-03 Hitachi Ltd Instruction readout control system
JPH06301532A (en) * 1993-04-19 1994-10-28 Kawasaki Steel Corp Microprocessor unit

Similar Documents

Publication Publication Date Title
JPS5621240A (en) Information processor
JPS5220735A (en) Microprogram controlled computer system
JPS5436138A (en) Direct memory access system
JPS5464439A (en) Address designation system
JPS55140949A (en) Information processor
JPS53113446A (en) Information processor and its method
JPS5259537A (en) Data processor
JPS5415620A (en) Buffer memory unit
JPS5563455A (en) Memory system
JPS5617450A (en) Data collection system
JPS5212536A (en) Buffer memory control system
JPS5576446A (en) Pre-fetch control system
JPS5474338A (en) Information processor
JPS55118170A (en) Memory access device
JPS52130249A (en) Register write-in system
JPS5687143A (en) Microcomputer system
JPS5597655A (en) Memory access system
JPS53122338A (en) Data processor
JPS5372532A (en) Access system for memory unit
JPS54144150A (en) Information processing system
JPS54151330A (en) Information processor
JPS5543680A (en) Address designation system
JPS5510659A (en) Data processor
JPS55116165A (en) Information processor
JPS52143725A (en) Data processing unit