JPS5528182A - Information processing unit - Google Patents

Information processing unit

Info

Publication number
JPS5528182A
JPS5528182A JP10142378A JP10142378A JPS5528182A JP S5528182 A JPS5528182 A JP S5528182A JP 10142378 A JP10142378 A JP 10142378A JP 10142378 A JP10142378 A JP 10142378A JP S5528182 A JPS5528182 A JP S5528182A
Authority
JP
Japan
Prior art keywords
address
memory
instruction
circuit
substraction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10142378A
Other languages
Japanese (ja)
Other versions
JPS611775B2 (en
Inventor
Hideshi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10142378A priority Critical patent/JPS5528182A/en
Publication of JPS5528182A publication Critical patent/JPS5528182A/en
Publication of JPS611775B2 publication Critical patent/JPS611775B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make easy the analysis of cause due to failure in the microprogram or hardware, by detecting the branch of microprogram sequence and following easily the progress of execution of microprogram.
CONSTITUTION: The instruction executed is stored in the control memory 1, the address of instruction read out from the memory 1 is formed with the address forming circuit 6, the instruction read out from the memory 1 is fed to the operation circuit 5 via the instruction register 2 and the decoder 4, and the instruction read out is processed for operation. Further, the shunt address register 8 sequentially receiving the address of the circuit 6 and delivering the shunt address, and the address stack memory 10 receiving the output of the register 8 and the second instruction address and memorizing the shunt address according to the second address are provided, the substraction circuit 9 performs substraction between the both addresses. When the result of substraction is other than a given value, the second address is changed with the address stack pointer 11 and added to the memory 10, to display the content of the memory 10 at the address display section 15.
COPYRIGHT: (C)1980,JPO&Japio
JP10142378A 1978-08-22 1978-08-22 Information processing unit Granted JPS5528182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10142378A JPS5528182A (en) 1978-08-22 1978-08-22 Information processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10142378A JPS5528182A (en) 1978-08-22 1978-08-22 Information processing unit

Publications (2)

Publication Number Publication Date
JPS5528182A true JPS5528182A (en) 1980-02-28
JPS611775B2 JPS611775B2 (en) 1986-01-20

Family

ID=14300292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10142378A Granted JPS5528182A (en) 1978-08-22 1978-08-22 Information processing unit

Country Status (1)

Country Link
JP (1) JPS5528182A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57168355A (en) * 1981-03-31 1982-10-16 Fujitsu Ltd Operation sequence storing device of microprogram
JPS60108938A (en) * 1983-11-17 1985-06-14 Yamatake Honeywell Co Ltd Program tracing system
JPS62217554A (en) * 1986-03-18 1987-09-25 Fujitsu Kiden Ltd Electromagnetic wave lighting type fluorescent lamp

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57168355A (en) * 1981-03-31 1982-10-16 Fujitsu Ltd Operation sequence storing device of microprogram
JPS60108938A (en) * 1983-11-17 1985-06-14 Yamatake Honeywell Co Ltd Program tracing system
JPS62217554A (en) * 1986-03-18 1987-09-25 Fujitsu Kiden Ltd Electromagnetic wave lighting type fluorescent lamp

Also Published As

Publication number Publication date
JPS611775B2 (en) 1986-01-20

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