JPS54141530A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS54141530A JPS54141530A JP4949678A JP4949678A JPS54141530A JP S54141530 A JPS54141530 A JP S54141530A JP 4949678 A JP4949678 A JP 4949678A JP 4949678 A JP4949678 A JP 4949678A JP S54141530 A JPS54141530 A JP S54141530A
- Authority
- JP
- Japan
- Prior art keywords
- error
- data
- main memory
- parity error
- causing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Debugging And Monitoring (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To enable the continuity of processing and the point out of the error position, by reading out correct data from the main memory immediately after the parity error is caused in the high speed buffer memory.
CONSTITUTION: When the parity error is detected in the buffer memory, the error flip flop 13 is set. Further, the instruction counter 19 is set to the address causing parity error at this time. Next, the address causing error data from the main memory is fetched by referencing the instruction counter. The data from the main memory is outputted to the bus 10 and the content is compared with the data causing the parity error at the comparison circuit 6. The result compared in bit correspondence is set and displayed on the error display register 17. Simultaneously, the error flip flop is reset and the instruction sequence is executed.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4949678A JPS54141530A (en) | 1978-04-25 | 1978-04-25 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4949678A JPS54141530A (en) | 1978-04-25 | 1978-04-25 | Information processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54141530A true JPS54141530A (en) | 1979-11-02 |
Family
ID=12832747
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4949678A Pending JPS54141530A (en) | 1978-04-25 | 1978-04-25 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54141530A (en) |
-
1978
- 1978-04-25 JP JP4949678A patent/JPS54141530A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5387640A (en) | Data processing unit | |
JPS5621240A (en) | Information processor | |
JPS54107645A (en) | Information processor | |
JPS5530727A (en) | Information processor | |
JPS55154635A (en) | Data processor | |
JPS54141530A (en) | Information processor | |
JPS53113446A (en) | Information processor and its method | |
JPS5452936A (en) | Memroy processor | |
JPS5528182A (en) | Information processing unit | |
JPS5563453A (en) | Memory system | |
JPS57200985A (en) | Buffer memory device | |
JPS5467337A (en) | Video memory unit | |
JPS5543652A (en) | Form jam processing system | |
JPS5563455A (en) | Memory system | |
JPS55140949A (en) | Information processor | |
JPS5566013A (en) | Data processing unit having interrupt function | |
JPS57199052A (en) | Data processing device | |
JPS54142022A (en) | Information processor | |
JPS5697164A (en) | Test and set and test and reset system | |
JPS5474335A (en) | Buffer memory unit | |
JPS5552598A (en) | Data processor | |
JPS55162156A (en) | Data processor | |
JPS5593580A (en) | Buffer memory control system | |
JPS5587397A (en) | Memory device | |
JPS556679A (en) | Check system of error control circuit |