JPS5738045A - Time division multiplex trunk device - Google Patents

Time division multiplex trunk device

Info

Publication number
JPS5738045A
JPS5738045A JP11433980A JP11433980A JPS5738045A JP S5738045 A JPS5738045 A JP S5738045A JP 11433980 A JP11433980 A JP 11433980A JP 11433980 A JP11433980 A JP 11433980A JP S5738045 A JPS5738045 A JP S5738045A
Authority
JP
Japan
Prior art keywords
transmission
trunk
transmission data
microprocessor
storage memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11433980A
Other languages
Japanese (ja)
Inventor
Yoshitsugu Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11433980A priority Critical patent/JPS5738045A/en
Publication of JPS5738045A publication Critical patent/JPS5738045A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To make the change in transmission pattern easy and to enable the transmission of test patern to a number of time slots at the same time, by providing a microprocessor generating service signals and transmission time slot holding memory. CONSTITUTION:When a test pattern is transmitted, a signal controller SCU instructs a transmission time slot number and trunk number to a microprocessor MP via a buffer Q of a time division multiplex trunk. The MP writes in the trunk number and transmission data to the corresponding address to the transmission time slot number of a storage memory HM via a buffer BR. The content of the storage memory HM is read out in sampling period of the highway HW and opens a gate MAGi corresponding to the trunk number and writes in the transmission data in a flip-flop FFi and also opens a gate HAGi and transmits the transmission data to the highway HW. The transmission data of the storage memory HM is changed according to the transmission pattern with the microprocessor MP.
JP11433980A 1980-08-20 1980-08-20 Time division multiplex trunk device Pending JPS5738045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11433980A JPS5738045A (en) 1980-08-20 1980-08-20 Time division multiplex trunk device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11433980A JPS5738045A (en) 1980-08-20 1980-08-20 Time division multiplex trunk device

Publications (1)

Publication Number Publication Date
JPS5738045A true JPS5738045A (en) 1982-03-02

Family

ID=14635297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11433980A Pending JPS5738045A (en) 1980-08-20 1980-08-20 Time division multiplex trunk device

Country Status (1)

Country Link
JP (1) JPS5738045A (en)

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