JPS57738A - Channel controller - Google Patents

Channel controller

Info

Publication number
JPS57738A
JPS57738A JP7377480A JP7377480A JPS57738A JP S57738 A JPS57738 A JP S57738A JP 7377480 A JP7377480 A JP 7377480A JP 7377480 A JP7377480 A JP 7377480A JP S57738 A JPS57738 A JP S57738A
Authority
JP
Japan
Prior art keywords
ffs
data transfer
main storage
controller
optional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7377480A
Other languages
Japanese (ja)
Inventor
Masao Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7377480A priority Critical patent/JPS57738A/en
Publication of JPS57738A publication Critical patent/JPS57738A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To measure the performance of repetitive data transfer automatically by providing mode changeover FFs and main storage access sequence starting FFs which correspond to channel devices and a means of initializing a data transfer control information table.
CONSTITUTION: When one of channel CH devices 3-1W3-n accesses a main storage controller 1, a memory request MRQ bit in a data transfer control information table 21 which correspons to the optional CH device is reset with a signal of the microinstruction decoder 28 of a CH controller 2. Then, one of mode changeover FFs 27-1W27-n of the corresponding CH is set to set desired one of FFs 24-1W24-n for starting a main storage access sequence through corresponding one of OR gates 23-1W23-n. If there is no memory reply at this point in time, the MRQ to the controller 1 is sent out repeatedly via a priority determining circuit 25. The number of the set signals per unit time is observed at a terminal 26 to measure the performance of the repetitive data transfer of the optional CH.
COPYRIGHT: (C)1982,JPO&Japio
JP7377480A 1980-06-03 1980-06-03 Channel controller Pending JPS57738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7377480A JPS57738A (en) 1980-06-03 1980-06-03 Channel controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7377480A JPS57738A (en) 1980-06-03 1980-06-03 Channel controller

Publications (1)

Publication Number Publication Date
JPS57738A true JPS57738A (en) 1982-01-05

Family

ID=13527884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7377480A Pending JPS57738A (en) 1980-06-03 1980-06-03 Channel controller

Country Status (1)

Country Link
JP (1) JPS57738A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4826908A (en) * 1987-12-30 1989-05-02 Mobil Oil Corporation Compositions of linear polyethylene and ethylene-vinyl alcohol polymer and films having reduced blocking
US5460760A (en) * 1994-04-18 1995-10-24 Mobil Oil Corporation Method of extruding ethylene-vinyl alcohol copolymer (EVOH)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4826908A (en) * 1987-12-30 1989-05-02 Mobil Oil Corporation Compositions of linear polyethylene and ethylene-vinyl alcohol polymer and films having reduced blocking
US5460760A (en) * 1994-04-18 1995-10-24 Mobil Oil Corporation Method of extruding ethylene-vinyl alcohol copolymer (EVOH)

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