JPS642498A - Time slot replacing circuit - Google Patents

Time slot replacing circuit

Info

Publication number
JPS642498A
JPS642498A JP15854887A JP15854887A JPS642498A JP S642498 A JPS642498 A JP S642498A JP 15854887 A JP15854887 A JP 15854887A JP 15854887 A JP15854887 A JP 15854887A JP S642498 A JPS642498 A JP S642498A
Authority
JP
Japan
Prior art keywords
memory
time slots
output
replaced
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15854887A
Other languages
Japanese (ja)
Other versions
JPH012498A (en
Inventor
Fukashi Uekawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP15854887A priority Critical patent/JPS642498A/en
Publication of JPH012498A publication Critical patent/JPH012498A/en
Publication of JPS642498A publication Critical patent/JPS642498A/en
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE: To reduce the scale of hardware by allowing an exchange and a transmitter to use one memory for data exchange by switching it by time slots in a system wherein a single buffer system and a double buffer system coexist.
CONSTITUTION: When time slots of a multiplex signal arriving as a data input are replaced on a double basis, the value of the output of a two-frequency- dividing counter 5 is added to the value of a sequential counter 3 to generate a write address and the data is written in the memory 14 for data exchange. Further, when time slots are replaced on a single buffer basis, the output of the two-frequency-dividing counter 5 is inhibited by an inhibit gate 8 with the output of a memory 7 for single buffer/double buffer switching indication and written in one of two divided memory areas. When time slots are replaced on the double buffer basis on a read side, the value of the two-frequency-dividing counter 5 is added to the output of a memory 4 for address control to read the memory 1 for data exchange, thereby replacing the time slots.
COPYRIGHT: (C)1989,JPO&Japio
JP15854887A 1987-06-24 1987-06-24 Time slot replacing circuit Pending JPS642498A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15854887A JPS642498A (en) 1987-06-24 1987-06-24 Time slot replacing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15854887A JPS642498A (en) 1987-06-24 1987-06-24 Time slot replacing circuit

Publications (2)

Publication Number Publication Date
JPH012498A JPH012498A (en) 1989-01-06
JPS642498A true JPS642498A (en) 1989-01-06

Family

ID=15674114

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15854887A Pending JPS642498A (en) 1987-06-24 1987-06-24 Time slot replacing circuit

Country Status (1)

Country Link
JP (1) JPS642498A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07193844A (en) * 1993-12-27 1995-07-28 Nec Corp Time switch

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07193844A (en) * 1993-12-27 1995-07-28 Nec Corp Time switch

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