KR960019680A - 반도체디바이스패키지 방법 및 디바이스 패키지 - Google Patents

반도체디바이스패키지 방법 및 디바이스 패키지 Download PDF

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KR960019680A
KR960019680A KR1019940029877A KR19940029877A KR960019680A KR 960019680 A KR960019680 A KR 960019680A KR 1019940029877 A KR1019940029877 A KR 1019940029877A KR 19940029877 A KR19940029877 A KR 19940029877A KR 960019680 A KR960019680 A KR 960019680A
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interface board
semiconductor device
substrate
chip
bump
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KR1019940029877A
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KR0137826B1 (ko
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김진성
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문정환
금성일렉트론 주식회사
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Priority to KR1019940029877A priority Critical patent/KR0137826B1/ko
Priority to JP7207022A priority patent/JPH08181275A/ja
Priority to US08/558,305 priority patent/US6069025A/en
Publication of KR960019680A publication Critical patent/KR960019680A/ko
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Abstract

본 발명은 반도체 디바이스의 패키지 방법으로서, 웨이퍼의 본딩패드에 접착용 솔더범프를 부착시키는 공정, 웨이퍼를 개개의 칩으로 절단하고 인터페이스보드와 칩을 부착하는 공정, 리드프레임과 인터페이스보드를 결합시키는 공정, 인터페이스보드의 범프패드와 리드프레임의 인너리드간을 와이어 본딩하고 몰딩하는 공정을 포함하여 이루어진다.
그리고 본 발명의 패키지는 인터페이스보드 기판과, 기판의 상하면에 형성된 다수의 인터페이스보드범프패드와, 기판의 상면에 형성된 인터페이스보드범프패드와 기판의 하면에 형성된 인터페이스보드범프패드를 전기적으로 연결하는 도선과, 인터페이스보드범프패드에서 전기적으로 연결된 인터폐이스보드의 와이어본드패드를 가지고 있는 터페이스보드와; 인터페이스브드의 상부 및 하부에 부착되고 솔더범프를 통하여 칩의 본딩패드와 전기적으로 서로 연결된 상부칩 및 하부칩과; 인터폐이스보드의 와이어본드패드와 도선으로 연결된 인너리드 및 아웃리드와; 인터페이스보드와 상부칩 및 하부칩과 인너리드를 카버하는 몰딩수지로 이루어진다.

Description

반도체디바이스패키지 방법 및 디바이스 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 반도체 디바이스 패키지 구조를 보인 단면도.
제3도는 본 발명의 인터페이스보드의 단면 구조를 보인 단면도.
제4도는 본 발명의 반도체 디바이스 패키지에서 상부 몰딩레진을 제거한 평면형태를 도시한 평면도.

Claims (16)

  1. 반도체 디바이스의 패키지 방법에 있어서, 웨이퍼의 본딩패드에 접착용 솔더범프를 부착시키는 공정, 웨이퍼를 개개의 칩으로 절단하고 인터페이스보드와 칩을 부착하는 공정, 리드프레임과 인터페이스보드를 결합시키는 공정, 인터페이스보드의 범프패드와 리드프레임의 인너리드간을 와이어 본딩하고 몰딩하는 공정을 포함하는 반도체디바이스의 패키지 방법.
  2. 제1항에 있어서, 웨이퍼의 본딩패드에 접착용 솔더범프를 부착시키는 공정은 포토레지스트를 이용한 사진 식각 공정으로 솔더범프 형성부위를 정하고 웨이퍼에 솔더를 데포지션하여 형성하는 것이 특징인 반도체디바이스의 패키지 방법.
  3. 제1항에 있어서, 웨이퍼의 본딩패드에 접착용 솔더범프를 부착시키는 공정은 포토레지스트를 이용한 사진식각 공정으로 솔더범프 형성부위를 정하고 웨이퍼를 용융된 솔드에 디핑하여 형성하는 것이 특징인 반도체디바이스의 패키지 방법.
  4. 제1항에 있어서, 인터페이스보드와 칩을 부착하기 전에 포토레지스트를 이용한 사진식각공정으로 솔드범프 부착부위를 정의하고 솔더를 데포지션, 딥핑, 또는 전기도금 등의 방법으로 인터페이스보드의 본드패드에 솔더범프를 부착하는 공정을 수행하는 것이 특징인 반도체디바이스의 패키지 방법.
  5. 제1항에 있어서, 인터페이스보드와 칩을 부착하기 전에 솔드마스크를 이용하여 솔드프린팅과 리플로우 공정을 실시하여 인터페이스보드의 본드패드에 솔드범프를 부착시키는 공정을 실시하는 것이 특징인 반도체디바이스의 패키지 방법.
  6. 제1항에 있어서, 인터페이스보드와 칩을 부착하는 공정은, 인터페이스보드위에 칩을 정위치 시킨후 압력과 열을 가하여 웨이퍼의 본딩패드에 부착된 솔더범프가 녹아서 인터페이스보드의 범프패드에 서로 융착되도록 하는 것이 특징인 반도체디바이스의 패키지 방법.
  7. 제1항에 있어서, 리드프레임과 인터페이스보드를 결합시키는 공정은, 리드프레임의 타이바에 양면접착테이퍼를 부착시킨 후 리드프레임과 인터페이스보드를 결합시키는 것이 특징인 반도체디바이스의 패키지 방법.
  8. 인터페이스보드 기판과, 기판의 상하면에 형성된 다수의 인터페이스보드범프패드와, 기판의 상면에 형성된 인터페이스보드범프패드와 기판의 하면에 형성된 인터페이스보드범프패드를 전기적으로 연결하는 도선과, 인터페이스보드범프패드에서 전기적으로 연결되 인터페이스보드의 와이어본드패드를 가지고 있는 인터페이스보드와, 상기 인터페이스보드의 상부 및 하부에 부착되고 솔더범프를 통하여 칩의 본딩패드와 전기적으로 서로 연결된 상부칩 및 하부칩과, 상기 인터페이스보드의 와이어본드패드와 도선으로 연결된 인너리드 및 아웃리드와, 상기 인터페이스보드, 상부칩 및 하부칩, 그리고 인너리드를 카버하는 몰딩수지로 이루어지는 반도체디바이스 패키지.
  9. 제8항에 있어서, 상기 인터페이스보드는 기판의 상면에 형성된 인터페이스보드범프패드와 기판의 하면에 형성된 인터페이스보드범프패드가 중심축에 대하여 서로 회전대칭되는 위치에 형성된 것이 특징인 반도체디바이스 패키지.
  10. 제8항에 있어서, 상기 인터페이스보드는 기판의 상면에 형성된 인터페이스보드범프패드와 기판의 하면에 형성된 인터페이스보드범프패드가 서로 다른 패턴으로 형성된 것이 특징인 반도체디바이스 패키지.
  11. 제8항에 있어서, 상기 인터페이스보드는 기판의 상면에 형성된 인터페이스보드범프패드와 기판의 하면에 형성된 인터페이스보드범프패드가 기판내를 통과하는 도선에 의하여 전기적 결선을 고려하여 서로 연결된 것이 특징인 반도체디바이스 패키지.
  12. 제8항에 있어서, 상기 인터페이스보드의 기판은 2층 이사의 다층을 이루는 것이 특징인 반도체디바이스 패키지.
  13. 제8항에 있어서, 상기 인터페이스보드의 기판은 세라믹인 것이 특징인 반도체디바이스 패키지.
  14. 제8항에 있어서, 상기 인터페이스보드의 기판은 2층 이상의 다층구조로서 상·하 반도체 칩간의 전기적 결선 관계를 P.C.B 형태로 연결하는 것이 특징인 반도체디바이스 패키지.
  15. 제8항에 있어서, 상기 인터페이스보드의 기판의 두께는 약 2MM 이하이고 패캐지내 집적도는 90% 이하인 구조를 갖는 것이 특징인 반도체디바이스 패키지.
  16. 제8항에 있어서, 상기 인터페이스보드와, 상기 인터페이스보드와 연결된 상부칩 및 하부칩과, 상기 인터페이스보드의 와이어본드패드와 도선으로 연결된 인너리드 및 아웃리드를 가지는 칩과 인터페이스의 적층구조를 하나 이상 다시 적층하여 전기적으로 결선한 후 몰딩하여서 된 것이 특징인 반도체디바이스 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940029877A 1994-11-15 1994-11-15 반도체 디바이스 패키지 방법 및 디바이스 패키지 KR0137826B1 (ko)

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JP7207022A JPH08181275A (ja) 1994-11-15 1995-08-14 半導体デバイスのパッケージ方法および半導体デバイスのパッケージ
US08/558,305 US6069025A (en) 1994-11-15 1995-11-15 Method for packaging a semiconductor device

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