KR960006086A - 이중 채널을 갖는 트랜지스터 및 그 제조방법 - Google Patents

이중 채널을 갖는 트랜지스터 및 그 제조방법 Download PDF

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KR960006086A
KR960006086A KR1019940015814A KR19940015814A KR960006086A KR 960006086 A KR960006086 A KR 960006086A KR 1019940015814 A KR1019940015814 A KR 1019940015814A KR 19940015814 A KR19940015814 A KR 19940015814A KR 960006086 A KR960006086 A KR 960006086A
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source
forming
gate insulating
insulating film
gate electrode
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KR1019940015814A
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KR100321757B1 (ko
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김광수
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김주용
현대전자산업 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823412MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 반도체 소자의 트랜지스터에 있어서, 반도체기판에 형성된 제1소스/드레인 영역에 의해 형성되는 제1채널과, 상기 제1채널 상부에 형성된 제1게이트절연막과, 상기 제1게이트절연막 상부에 형성된 게이트전극과, 상기 게이트전극을 감싸는 제2게이트절연막과. 상기 제1소스.드레인 영역 상부에 형성된 제2소스.드레인 영역에 의해 상기 게이트전극 상부에 형성된 제2채널을 포함하는 것을 특징으로 이중 채널을 갖는 트랜지스터에 관한 것으로, 트랜지스터의 채널영역을 실리콘기판 및 게이트전극 상부에 이중으로 형성시킴으로써 전류 구동능력을 향상시키고, 따라서 소자의 수율 및 신뢰성을 향상시키는 효과를 갖는다.

Description

이중 채널을 갖는 트랜지스터 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A 내지 제1C도는 본 발명의 일실시예에 따른 트랜지스터 제조 공정 단면도.

Claims (3)

  1. 반도체 소자의 트랜지스터에 있어서, 반도체기판(101,201)에 형성된 제1소스/드레인 영역(105,205)에 의해 형성되는 제1채널(110,210)과, 상기 제1채널 (110,210) 상부에 형성된 제1게이트절연막(103,203)과, 상기 제1게이트절연막 (103,203) 상부에 형성된 게이트전극(104.204)과, 상기 게이트전극(104,204)을 감싸는 제2게이트절연막(106,206)과, 상기 제1소스/드레인 영역(105,205) 상부에 형성된 제2소스/드레인 영역(1069,209)에 의해 상기 게이트전극(104,204) 상부에 형성된 제2채널(111,211)을 포함하는 것을 특징으로 하는 이중 채널을 갖는 트랜지스터.
  2. 이중 채널을 갖는 트랜지스터 제조방법에 있어서, 반도체기판(101)상에 필드산화막(102), 제1게이트절연막(103), 게이트전극(104)을 차례로 형성하는 단계; 상기 게이트전극(104)을 이온주입 배리어로 사용하여 이온주입을 실시하여 제1소스/드레인 영역(105)을 형성하는 단계; 상기 게이트전극(104) 및 제1게이트절연막(103)을 감싸는 제2게이트절연막(106)을 형성한 다음 전체구조 상부에 도핑이 되지 않은 반도체막(107)을 형성하는 단계; 상기 반도체막(107) 상에 소스/드레인 영역 형성을 위한 감광막(108) 패턴을 형성하는 단계; 상기 감광막(108)을 이온주입 배리어로 사용하여 이온주입을 실시하여 제2소스/드레인 영역(109)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 이중 채널을 갖는 트랜지스터 제조방법.
  3. 이중 채널을 갖는 트랜지스터 제조방법에 있어서, 반도체기판(201) 상에 필드산화막(202), 제1게이트절연막(203), 게이트전극(204), 상기 게이트전극(204) 및 제1게이트절연막(203)을 감싸는 제2게이트절연막(206)을 차례로 형성하는 단계; 전체구조 상부에 도핑이 되지 않은 반도체막(207)을 형성한 후 그상부에 소스/드레인 영역 형성을 위한 감광막(208) 패턴을 형성하는 단계; 상기 감광막(208)을 이온주입 배리어로 사용하여 반도체기판까지 이온주입을 실시하여 상기 반도체기판(201) 및 반도체막(207)에 제1 및 제2소스/드레인 영역(205,209)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 이중 채널을 갖는 트랜지스터 제조방법.
    ※참고사항:최초출원 내용에 의하여 공개되는 것임.
KR1019940015814A 1994-07-01 1994-07-01 이중채널을갖는트랜지스터및그제조방법 KR100321757B1 (ko)

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KR1019940015814A KR100321757B1 (ko) 1994-07-01 1994-07-01 이중채널을갖는트랜지스터및그제조방법

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KR1019940015814A KR100321757B1 (ko) 1994-07-01 1994-07-01 이중채널을갖는트랜지스터및그제조방법

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KR100898252B1 (ko) * 2007-09-07 2009-05-18 주식회사 동부하이텍 반도체 소자 및 이의 제조방법

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