KR950018380A - 동계 금속용 연마액 및 반도체 장치의 제조 방법 - Google Patents

동계 금속용 연마액 및 반도체 장치의 제조 방법 Download PDF

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KR950018380A
KR950018380A KR1019940033879A KR19940033879A KR950018380A KR 950018380 A KR950018380 A KR 950018380A KR 1019940033879 A KR1019940033879 A KR 1019940033879A KR 19940033879 A KR19940033879 A KR 19940033879A KR 950018380 A KR950018380 A KR 950018380A
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히데아끼 히라바야시
마사또시 히구찌
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사또 후미오
가부시끼가이샤 도시바
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/14—Aqueous compositions
    • C23F1/16—Acidic compositions
    • C23F1/18—Acidic compositions for etching copper or alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09G—POLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00—Polishing compositions
    • C09G1/02—Polishing compositions containing abrasives or grinding agents
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F3/00—Brightening metals by chemical means
    • C23F3/04—Heavy metals
    • C23F3/06—Heavy metals with acidic solutions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명의 목적은 동 또는 동합금의 침지시에 상기 동 또는 동합금을 거의 에칭하지 않고, 연마 처리시에 상기 동 또는 동합금을 용해시키서 침지시와 연마처리시 사이에 수배 내지 수십배의 에칭 속도차를 나타내는 동계 금속용 연마액을 제공하고자 하는 것이다.
본 발명의 구성은 아미노 초산 및 아미드 유산에서 선택되는 적어도 1종류의 유기산과 산화제와 물을 함유하는 것을 특징으로 하고 있다.

Description

동계 금속용 연마액 및 반도체 장치의 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 연마 공정에 사용되는 폴리싱 장치를 도시한 개략도이다.
제2도는 0.1중량%의 아미노초산, 과산화수소 및 물로 구성되는 조성의 연마액에서의 과산화수소의 양과 그 연마액에 침지(浸漬)했을 때의 Cu막의 에칭 속도, 연마 처리시의 Cu막의 폴리싱 속도의 관계를 도시한 특성도이다.
제4도는 가공전에 본 발명의 연마액의 침지 후 연마 처리 후의 Cu막 표면의 XPS에 의한 스펙트럼도이다.
제5도는 0.9중량%의 아미노 초산, 과산화수소 및 물로 구성되는 조성의 연마액에서의 과산화수소의 양과 그 연마액에 침지했을 때의 Cu막의 에칭 속도, 연마 처리시의 Cu막의 폴리싱 속도의 관계를 도시한 특성도이다.
제6도는 아미드 유산, 과산화수소 및 물로 구성되는 조성의 연마액에서의 과산화수소의 양과 그 연마액에 침지했을 때의 Cu막의 에칭 속도, 연마 처리시의 Cu막의 폴리싱 속도의 관계를 도시한 특성도이다.

Claims (20)

  1. 아미노 초산 및 아미드 유산에서 선택되는 적어도 1종류의 유기산과 산화제와 물을 함유하는 것을 특징으로 하는 동계 금속용 연마액.
  2. 제1항에 있어서, 상기 산화제는 과산화수소인 것을 특징으로 하는 동계 금속용 연마액.
  3. 제1항에 있어서, 상기 유기산은 상기 연마액 중에 0.01내지 10중량%의 양으로 함유되고, 상기 유기산과 상기 산화제의 함유 비율은 중량 비율에서 상기 유기산 1에 대해 상기 산화제가 20이상인 것을 특징으로 하는 동계 금속용 연마액.
  4. 제1항에 있어서, PH를 9내지 14로 조절하기 위한 알카리제가 더 함유되는 것을 특징으로 하는 동계 금속용 연마액.
  5. 제1항에 있어서, 연마 입자(硏磨粒子)를 더 함유하는 것을 특징으로 하는 동계 금속용 연마액.
  6. 제5항에 있어서, 상기 연마 입자는 상기 연마액 중에 1내지 14중량%의 양으로 함유되는 것을 특징으로 하는 동계 금속용 연마액.
  7. 반도체 기판 위의 절연막에 배선층의 형상에 상당하는 홈 및/또는 개구부를 형성하는 공정, 상기 홈 및/또는 개구부를 포함하는 상기 절연막 위에 동 또는 동합금으로 된 배선 재료막을 퇴적하는 공정 및 아미노 초산 및 아미드 유산에서 선택되는 적어도 1종류의 유기산과 산화제와 물을 함유하는 연마액을 이용해서 상기 배선 재료막을 상기 절연막의 표면이 노출될 때까지 연마 처리함으로써 상기 절연막에 그 표면과 면이 일치하는 매입 배선층을 형성하는 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.
  8. 제7항에 있어서, 상기 Cu합금은 Cu-Si 합금, Cu-Al 합금, Cu-Si-Al 합금 또는 Cu-Ag합금인 것을 특징으로 하는 반도체 장치의 제조 방법.
  9. 제7항에 있어서, 상기 연마 처리는 연마 패드로 덮인 턴 테이블, 상기 테이블의 연마 패드에 상기 연마액을 공급하는 수단, 상기 반도체 기판을 아래쪽 면으로 유지하고, 상기 기판을 상기 연마 패드에 압압해서 회전시키는 기판 홀더를 구비한 폴리싱 장치를 이용해서 행할 수 있는 것을 특징으로 하는 반도체 장치의 제조 방법.
  10. 제9항에 있어서, 상기 연마 처리의 종점 검출은 상기 폴리싱 장치의 상기 테이블의 회전 토크의 변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  11. 제9항에 있어서, 상기 연마 처리의 종점 검출은 상기 연마 패드의 온도 변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  12. 제9항에 있어서, 상기 연마 처리의 종점 검출은 상기 연마 패드에 공급되는 상기 연마액의 pH변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  13. 반도체 기판 위의 절연막에 배선층의 형상에 상당하는 홈 및/또는 개구부를 형성하는 공정, 상기 홈 및/또는 개구부를 포함하는 상기 절연막 위에 동 또는 동합금으로 된 배선 재료막을 퇴적하는 공정, 아미노 초산 및 아미드 유산에서 선택되는 적어도 1종류의 유기산과 산화제와 물을 함유하는 연마액을 이용해서 상기 배선 재료막을 상기 절연막의 표면이 노출될 때까지 연마 처리함으로써 상기 절연막에 그 표면과 면이 일치하는 매입 배선층을 형성하는 공정 및 상기 배선층을 포함하는 상기 절연막 표면을 용존 오존 수용액으로 처리하고, 희불산 수용액으로 다시 처리하는 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.
  14. 제13항에 있어서, 상기 Cu합금은 Cu-Si 합금, Cu-Al 합금, Cu-Si-Al 합금 또는 Cu-Ag합금인 것을 특징으로 하는 반도체 장치의 제조 방법.
  15. 제13항에 있어서, 연마 패드로 덮인 턴 테이블, 상기 테이블의 연마 패드에 상기 연마액을 공급하는 수단, 상기 반도체 기판을 아래쪽 면으로 유지하고, 상기 기판을 상기 연마 패드에 압압해서 회전시키는 기판 홀더를 폴리싱 장치를 이용해서 행할 수 있는 것을 특징으로 하는 반도체 장치의 제조 방법.
  16. 제15항에 있어서, 상기 연마 처리의 종점 검출은 상기 폴리싱 장치의 상기 테이블의 회전 토크의 변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  17. 제15항에 있어서, 상기 연마 처리의 종점 검출은 상기 연마 패드의 온도 변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  18. 제15항에 있어서, 상기 연마 처리의 종점 검출은 상기 연마 패드에 공급되는 상기 연마액의 pH변화에 기초해서 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  19. 제13항에 있어서, 상기 용존 오존 수용액은 오존 농도가 0.1내지 25ppm인 것을 특징으로 하는 반도체 장치의 제조 방법.
  20. 제13항에 있어서, 상기 희불산 수용액은 불산 농도가 0.05내지 20%인 것을 특징으로 하는 반도체 장치의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940033879A 1993-12-14 1994-12-13 동계 금속용 연마액 및 반도체 장치의 제조 방법 KR0165145B1 (ko)

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