KR940012488A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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KR940012488A
KR940012488A KR1019930024923A KR930024923A KR940012488A KR 940012488 A KR940012488 A KR 940012488A KR 1019930024923 A KR1019930024923 A KR 1019930024923A KR 930024923 A KR930024923 A KR 930024923A KR 940012488 A KR940012488 A KR 940012488A
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gas
film
oxide film
insulating film
semiconductor device
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KR0131439B1 (ko
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타카시 후카다
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나카무라 타메아키
수미토모킨조쿠코오교오 카부시키가이샤
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Abstract

불소를 함유하는 실리콘화합물 가스를 사용한 플라즈마CVD법으로 Si 산화막을 형성함으로서, 입자의 발생을 억제하여 품질 및 수율을 향상시키고, 또, 층간 절연막 또는 불활성화 막으로서의 Si 산화막의 평탄화 특성을 향상시키며, 또, 신호전달의 고속화를 도모하도록 한 반도체 장치 및 그 제조방법에 관한 것이다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는, 본 발명의 제1실시예에 사용하는 ECR플라즈마 CVD장치의 구조를 도식적으로 표시하는 종단면도이다.
제8도는, 제3실시예의 Si 산화막의 도식적인 단면도이다.
제9도는, 제4실시예에 사용하는 ECR플라즈마 CVD장치의 구조를 표시하는 도식적인 종단면도이다.

Claims (16)

  1. 0.1∼20원자％의 불소를 함유한 Si 산화막을 포함하는 절연막으로 구성된 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기한 절연막은 층간 절연막으로 사용되는 것을 특징으로 하는 반도체장치
  3. 제1항에 있어서, 상기한 절연막은 층간 불활성화막으로 사용되는 것을 특징으로 하는 반도체 장치.
  4. 제1항에 있어서, 배선(22), (22)을 포함하여 구성되며, 상기한 절연막은 상기한 배선(22), (22)의 표면에 형성된 불소를 함유하지 않은 산화막인 것을 특징으로 하는 반도체장치.
  5. 제1항에 있어서, 배선(22), (22)을 포함하여 구성되며, 상기한 Si 산화막이 인접하는 상기한 배선(22), (22)사이에 형성되어 있는 것을 특징으로 하는 반도체장치
  6. 비유전율이 3.7∼2.9인 Si 산화막을 포함하는 절연막으로 구성된 것을 특징으로 하는 반도체장치
  7. 제6항에 있어서, 상기한 절연막은 층간 절연막으로 사용되는 것을 특징으로 하는 반도체장치.
  8. 제6항에 있어서, 상기한 절연막은 불활성화막으로 사용되는 것을 특징으로 하는 반도체장치.
  9. 불소를 함유한 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화막으로서의 Si 산화막을 형성하는 것으로 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
  10. 제9항에 있어서, 상기한 플라즈마CVD법이 자계 내에서 1회 실시되는 것을 특징으로 하는 반도체장치의 제조방법.
  11. 제10항에 있어서, 상기한 플라즈마CVD법이 ECR플라즈마CVD법인 것을 특징으로 하는 반도체장치의 제조방법.
  12. 제9항에 있어서, 기판(21)에 음극의 직류전압을 인가하는 단계를 포함하여 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
  13. 제9항에 있어서, 기판(41)에 고주파 전압을 인가하는 단계를 포함하여 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
  14. 불소를 함유하지 않은 실리콘화합물 가스와, O2가스와 NO2가스로 구성된 가스군으로부터 선택된 가스를 사용하여 플라즈마CVD법에 의해 층간 절연막 또는 불활성화 막으로서, 제1의 Si 산화막을 형성하는 단계와, 상기한 제1의 Si 산화막 위에, 불소를 함유한 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택된 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화 막으로서의 제2의 Si 산화막을 형성하는 단계로 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
  15. 불소를 함유한 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막으로서의 제2의 Si 산화막을 형성하는 단계와, 상기한 제2의 Si 산화막위에 불소를 함유하지 않은 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화막으로서, 제1의 Si 산화막을 형성하는 단계로 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
  16. 불소를 함유하지 않은 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화막으로서, 제1의 Si 산화막을 형성하는 단계, 상기한 제1의 Si 산화막 위에, 불소를 함유한 실리콘화합물 가스와, O2가스와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화 막으로서의 제2의 Si 산화막을 형성하는 단계 및 상기한 제2의 Si 산화막 위에, 불소를 함유하지 않은 실리콘화합물 가스와, O2와 N2O가스로 구성된 가스군으로부터 선택한 가스를 사용하여, 플라즈마CVD법에 의해 층간 절연막 또는 불활성화 막으로서, 제3의 Si 산화막을 형성하는 단계로 구성되는 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930024923A 1992-11-24 1993-11-22 반도체장치 및 그 제조방법 KR0131439B1 (ko)

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US7034400B2 (en) 1999-12-20 2006-04-25 International Business Machines Corporation Dual damascene interconnect structure using low stress fluorosilicate insulator with copper conductors

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