KR940008718B1 - 직류 전류를 제거한 데이타 출력버퍼 - Google Patents
직류 전류를 제거한 데이타 출력버퍼 Download PDFInfo
- Publication number
- KR940008718B1 KR940008718B1 KR1019910018835A KR910018835A KR940008718B1 KR 940008718 B1 KR940008718 B1 KR 940008718B1 KR 1019910018835 A KR1019910018835 A KR 1019910018835A KR 910018835 A KR910018835 A KR 910018835A KR 940008718 B1 KR940008718 B1 KR 940008718B1
- Authority
- KR
- South Korea
- Prior art keywords
- output
- pull
- level
- signal
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910018835A KR940008718B1 (ko) | 1991-10-25 | 1991-10-25 | 직류 전류를 제거한 데이타 출력버퍼 |
| TW081107012A TW212863B (https=) | 1991-10-25 | 1992-09-04 | |
| FR929211593A FR2683076B1 (fr) | 1991-10-25 | 1992-09-29 | Memoire tampon de sortie de donnees presentant des caracteristiques de bruit ameliorees. |
| DE4234505A DE4234505C2 (de) | 1991-10-25 | 1992-10-13 | Datenausgangspuffer |
| ITMI922418A IT1255902B (it) | 1991-10-25 | 1992-10-22 | Buffer di emissione dati con caratteristiche di rumore migliorate |
| JP4286223A JPH0752589B2 (ja) | 1991-10-25 | 1992-10-23 | データ出力バッファ |
| US07/964,622 US5311076A (en) | 1991-10-25 | 1992-10-23 | Tristate data output buffer having reduced switching noise and intermediate-level setting |
| GB9222423A GB2260838B (en) | 1991-10-25 | 1992-10-26 | Data output buffers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910018835A KR940008718B1 (ko) | 1991-10-25 | 1991-10-25 | 직류 전류를 제거한 데이타 출력버퍼 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930008859A KR930008859A (ko) | 1993-05-22 |
| KR940008718B1 true KR940008718B1 (ko) | 1994-09-26 |
Family
ID=19321779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019910018835A Expired - Fee Related KR940008718B1 (ko) | 1991-10-25 | 1991-10-25 | 직류 전류를 제거한 데이타 출력버퍼 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5311076A (https=) |
| JP (1) | JPH0752589B2 (https=) |
| KR (1) | KR940008718B1 (https=) |
| DE (1) | DE4234505C2 (https=) |
| FR (1) | FR2683076B1 (https=) |
| GB (1) | GB2260838B (https=) |
| IT (1) | IT1255902B (https=) |
| TW (1) | TW212863B (https=) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5694361A (en) * | 1992-03-18 | 1997-12-02 | Uchida; Toshiya | Output circuit |
| KR960006911B1 (ko) * | 1992-12-31 | 1996-05-25 | 현대전자산업주식회사 | 데이타 출력버퍼 |
| US5500817A (en) * | 1993-01-21 | 1996-03-19 | Micron Technology, Inc. | True tristate output buffer and a method for driving a potential of an output pad to three distinct conditions |
| US5331593A (en) * | 1993-03-03 | 1994-07-19 | Micron Semiconductor, Inc. | Read circuit for accessing dynamic random access memories (DRAMS) |
| US5469385A (en) * | 1993-05-11 | 1995-11-21 | Texas Instruments Incorporated | Output buffer with boost from voltage supplies |
| US5369316A (en) * | 1993-11-22 | 1994-11-29 | United Microelectronics Corporation | Advanced output buffer with reduced voltage swing at output terminal |
| US5513140A (en) * | 1994-06-01 | 1996-04-30 | Micron Technology, Inc. | Data output buffer |
| KR970005570B1 (ko) * | 1994-07-14 | 1997-04-17 | 현대전자산업 주식회사 | 데이타 출력버퍼 |
| US5559465A (en) * | 1994-07-29 | 1996-09-24 | Cypress Semiconductor Corporation | Output preconditioning circuit with an output level latch and a clamp |
| JPH08148986A (ja) * | 1994-11-21 | 1996-06-07 | Mitsubishi Electric Corp | 出力バッファ回路 |
| KR0172798B1 (ko) * | 1995-06-30 | 1999-03-30 | 김주용 | 모드 적응형 데이타 출력 버퍼 |
| US5568062A (en) * | 1995-07-14 | 1996-10-22 | Kaplinsky; Cecil H. | Low noise tri-state output buffer |
| KR100202645B1 (ko) * | 1995-12-21 | 1999-06-15 | 문정환 | 프리차지회로를 내장한 씨모스 출력회로 |
| US5844425A (en) * | 1996-07-19 | 1998-12-01 | Quality Semiconductor, Inc. | CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations |
| US6243779B1 (en) | 1996-11-21 | 2001-06-05 | Integrated Device Technology, Inc. | Noise reduction system and method for reducing switching noise in an interface to a large width bus |
| US5805505A (en) * | 1996-12-16 | 1998-09-08 | Micron Technology, Inc. | Circuit and method for converting a pair of input signals into a level-limited output signal |
| KR19980066284A (ko) * | 1997-01-22 | 1998-10-15 | 김광호 | 포토테지스트 도포장치 및 도포방법 |
| US5864244A (en) * | 1997-05-09 | 1999-01-26 | Kaplinsky; Cecil H. | Tristate buffer circuit with transparent latching capability |
| KR100298182B1 (ko) * | 1997-06-24 | 2001-08-07 | 박종섭 | 반도체메모리소자의출력버퍼 |
| KR19990004896A (ko) * | 1997-06-30 | 1999-01-25 | 김영환 | 반도체 메모리 소자의 프리셋 회로 |
| US5889697A (en) * | 1997-10-08 | 1999-03-30 | Advanced Micro Devices | Memory cell for storing at least three logic states |
| US6043680A (en) * | 1998-02-02 | 2000-03-28 | Tritech Microelectronics, Ltd. | 5V tolerant I/O buffer |
| US6163169A (en) * | 1998-08-13 | 2000-12-19 | International Business Machines Corporation | CMOS tri-state control circuit for a bidirectional I/O with slew rate control |
| US6172522B1 (en) * | 1998-08-13 | 2001-01-09 | International Business Machines Corporation | Slew rate controlled predriver circuit |
| US6377102B2 (en) * | 2000-02-29 | 2002-04-23 | Texas Instruments Incorporated | Load equalization in digital delay interpolators |
| US6266284B1 (en) | 2000-04-25 | 2001-07-24 | Advanced Micro Devices, Inc. | Output buffer for external voltage |
| KR100500946B1 (ko) * | 2000-06-30 | 2005-07-14 | 매그나칩 반도체 유한회사 | 전자기 방해를 개선한 데이터 입출력 버퍼 |
| US6653878B2 (en) * | 2001-09-24 | 2003-11-25 | Microchip Technology Inc. | Low-power output controlled circuit |
| KR100613448B1 (ko) * | 2004-10-07 | 2006-08-21 | 주식회사 하이닉스반도체 | 데이터 가속회로 및 이를 이용한 데이터 전송회로 |
| KR100643913B1 (ko) * | 2004-11-03 | 2006-11-10 | 매그나칩 반도체 유한회사 | 출력 버퍼 |
| KR101996067B1 (ko) * | 2013-04-15 | 2019-07-05 | 에스케이하이닉스 주식회사 | 입출력라인구동회로 |
| US9385718B1 (en) * | 2013-10-18 | 2016-07-05 | Altera Corporation | Input-output buffer circuit with a gate bias generator |
| US10892760B1 (en) * | 2019-10-15 | 2021-01-12 | Qualcomm Incorporated | Dynamic transistor gate overdrive for input/output (I/O) drivers and level shifters |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4329600A (en) * | 1979-10-15 | 1982-05-11 | Rca Corporation | Overload protection circuit for output driver |
| JPS5856286B2 (ja) * | 1980-12-25 | 1983-12-14 | 富士通株式会社 | 出力バッファ回路 |
| JPS5942690A (ja) * | 1982-09-03 | 1984-03-09 | Toshiba Corp | 半導体記憶装置 |
| JPS63112893A (ja) * | 1986-10-28 | 1988-05-17 | Mitsubishi Electric Corp | 半導体集積回路 |
| JPH0817037B2 (ja) * | 1987-12-03 | 1996-02-21 | 松下電子工業株式会社 | スタティックramの出力回路 |
| JPH01200819A (ja) * | 1988-02-05 | 1989-08-14 | Toshiba Corp | メモリ集積回路 |
| KR910002748B1 (ko) * | 1988-04-12 | 1991-05-04 | 삼성 반도체통신 주식회사 | 반도체장치에 있어서 데이타 출력 버퍼회로 |
| JPH0777345B2 (ja) * | 1988-11-04 | 1995-08-16 | 三菱電機株式会社 | 半導体装置 |
| KR920002426B1 (ko) * | 1989-05-31 | 1992-03-23 | 현대전자산업 주식회사 | 집적회로의 출력버퍼회로 |
| US4963766A (en) * | 1989-06-28 | 1990-10-16 | Digital Equipment Corporation | Low-voltage CMOS output buffer |
| US5051619A (en) * | 1989-09-07 | 1991-09-24 | Harris Corporation | Predrive circuit having level sensing control |
| US4991140A (en) * | 1990-01-04 | 1991-02-05 | Motorola, Inc. | Integrated circuit memory with improved di/dt control |
| JPH03219495A (ja) * | 1990-01-24 | 1991-09-26 | Sony Corp | 出力回路 |
| JP2623918B2 (ja) * | 1990-06-04 | 1997-06-25 | 日本電気株式会社 | 出力バッファ回路 |
| US5107142A (en) * | 1990-10-29 | 1992-04-21 | Sun Microsystems, Inc. | Apparatus for minimizing the reverse bias breakdown of emitter base junction of an output transistor in a tristate bicmos driver circuit |
-
1991
- 1991-10-25 KR KR1019910018835A patent/KR940008718B1/ko not_active Expired - Fee Related
-
1992
- 1992-09-04 TW TW081107012A patent/TW212863B/zh not_active IP Right Cessation
- 1992-09-29 FR FR929211593A patent/FR2683076B1/fr not_active Expired - Lifetime
- 1992-10-13 DE DE4234505A patent/DE4234505C2/de not_active Expired - Lifetime
- 1992-10-22 IT ITMI922418A patent/IT1255902B/it active IP Right Grant
- 1992-10-23 US US07/964,622 patent/US5311076A/en not_active Expired - Lifetime
- 1992-10-23 JP JP4286223A patent/JPH0752589B2/ja not_active Expired - Fee Related
- 1992-10-26 GB GB9222423A patent/GB2260838B/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| FR2683076A1 (fr) | 1993-04-30 |
| ITMI922418A1 (it) | 1994-04-22 |
| US5311076A (en) | 1994-05-10 |
| DE4234505C2 (de) | 1995-07-13 |
| IT1255902B (it) | 1995-11-17 |
| ITMI922418A0 (it) | 1992-10-22 |
| JPH05210989A (ja) | 1993-08-20 |
| TW212863B (https=) | 1993-09-11 |
| GB2260838A (en) | 1993-04-28 |
| GB9222423D0 (en) | 1992-12-09 |
| KR930008859A (ko) | 1993-05-22 |
| DE4234505A1 (de) | 1993-04-29 |
| JPH0752589B2 (ja) | 1995-06-05 |
| GB2260838B (en) | 1995-07-05 |
| FR2683076B1 (fr) | 1994-06-10 |
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| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20110927 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |