KR930020589A - 반도체장치 및 그 제조방법 - Google Patents
반도체장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR930020589A KR930020589A KR1019930004873A KR930004873A KR930020589A KR 930020589 A KR930020589 A KR 930020589A KR 1019930004873 A KR1019930004873 A KR 1019930004873A KR 930004873 A KR930004873 A KR 930004873A KR 930020589 A KR930020589 A KR 930020589A
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- South Korea
- Prior art keywords
- semiconductor device
- insulating film
- manufacturing
- matrix
- mesh
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000011159 matrix material Substances 0.000 claims abstract 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract 7
- 238000004132 cross linking Methods 0.000 claims abstract 7
- 125000004430 oxygen atom Chemical group O* 0.000 claims abstract 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract 4
- 125000004429 atom Chemical group 0.000 claims abstract 4
- 229910052731 fluorine Inorganic materials 0.000 claims abstract 4
- 239000011737 fluorine Substances 0.000 claims abstract 4
- 125000005843 halogen group Chemical group 0.000 claims abstract 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract 4
- 125000001153 fluoro group Chemical group F* 0.000 claims abstract 3
- 229910052710 silicon Inorganic materials 0.000 claims abstract 2
- 239000002994 raw material Substances 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims 12
- 238000000034 method Methods 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims 3
- 229910052785 arsenic Inorganic materials 0.000 claims 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims 3
- 229910052796 boron Inorganic materials 0.000 claims 3
- 229910052736 halogen Inorganic materials 0.000 claims 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims 2
- 150000001875 compounds Chemical class 0.000 claims 2
- 238000000151 deposition Methods 0.000 claims 2
- 239000011229 interlayer Substances 0.000 claims 2
- 239000000463 material Substances 0.000 claims 2
- 229910052698 phosphorus Inorganic materials 0.000 claims 2
- 239000011574 phosphorus Substances 0.000 claims 2
- 239000007787 solid Substances 0.000 claims 2
- 229910003816 SiH2F2 Inorganic materials 0.000 claims 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- MGNHOGAVECORPT-UHFFFAOYSA-N difluorosilicon Chemical compound F[Si]F MGNHOGAVECORPT-UHFFFAOYSA-N 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 238000006467 substitution reaction Methods 0.000 claims 1
- 235000014653 Carica parviflora Nutrition 0.000 abstract 2
- 241000243321 Cnidaria Species 0.000 abstract 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 abstract 1
- 229910008045 Si-Si Inorganic materials 0.000 abstract 1
- 229910006411 Si—Si Inorganic materials 0.000 abstract 1
- 239000005380 borophosphosilicate glass Substances 0.000 abstract 1
- 230000007423 decrease Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 2
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
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- H01L21/02148—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
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- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
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- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은, 반도체장치의 절연막을 평탄화하기 위하여 플로시키는 온도를 저하시켜, 반도체장치의 특성을 양호하게 유지하는 것을 목적으로 한 것으로써, 그 구성에 있어서, 절연막이 실리콘산화막계의 경우, 절연막의 매트릭스의 주요소가 되는 실리콘원자Si와 부요소가 되는 산화원자 0에 의해서 그물코구조가 형성되어 있다. 이 매트릭스의 부요소인 산소원자 0를 비가교형원소로 이루어진 비가교요소 예를들면 1가 원소인 불소F등의 할로겐원자에 의해서 치환한다. 이에의해, 산호원자 0를 개재한 실리콘 원자 Si-Si간의 가교를 이 부위에서 절단하고, 절연막의 점성을 저하시키고, 플로온도를 저하시킨다. 예를들면 BPSG 막내부의 일부의 산호 0를 불소 F에 의해서 치환해서 FBPSG막으로 하였을 경우, 플로온도가 900℃에서부터 850℃로 저하하고, 반도체장치의 쇼트채널효과를 발생시키지 않는 온도에서, 중간절연막을 플로시킬 수 있는 것을 특징으로 한 것이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제1실시예에 있어서의 반도체장치의 구조를 표시한 단면도.
제2도는 제1실시예에 있어서의 FBPSG막을 제조하기 위한 CVD 장치의 구성을 개략적으로 표시한 도면.
제3도는 제1실시예에 있어서의 원료가스인 FTES의 분지구조식을 표시한 도면.
Claims (20)
- 반도체기판위에 절연막을 가진 반도체장치에 있어서, 상기 절연막은, 적어도 1종류의 원소로 이루어진 주요소와 적어도 1종류의 원소로 이루어진 부요소가 그물코 형상으로 결합해서 이루어진 매트릭스와, 상기 부요소중 일부의 부요소와 치환해서 상기 주요소에 결합하고, 매트릭스의 그물코를 부분적으로 절단하는 적어도 1종류의 비가교형원소로 이루어진 비가교요소에 의해 구성되어 있는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 비가교형 원소는 할로겐원소인 것을 특징으로 하는 반도체장치.
- 제2항에 있어서, 상기 비가교형원소는 불소인 것을 특징으로 한는 반도체장치.
- 제1항, 제2항 또는 제3항에 있어서, 주요소는 실리콘원자로 이루어지고, 부요소는 산소원자로 이루어지고, 상기 절연막의 매트릭스는, 실리콘원자와 산소원자가 그물코형상으로 결합한 실리콘산화막으로 구성되어 있는 것을 특징으로 하는 반도체 장치.
- 제4항에 있어서, 상기 절연막의 매트릭스를 구성하는 실리콘산화막내부에서, 그물코속의 일부의 실리콘원자가 인, 붕소 및 비소중 적어도 1종류의 원자에 의해서 치환되어 있는 것을 특징으로 하는 반도체 장치.
- 제1항, 제2항, 제3항, 제4항 또는 제5항에 있어서, 절연막은 충간절연막인 것을 특징으로 하는 반도체 장치.
- 반도체기판위에, 그물코형상의 매트릭스를 가진절연막을 구비한 반도체장치의 제조방법으로서, 적어도 1종류의 원소로 이루어진 주요소와, 적어도 1종류의 원소로 이루어진 부요소와, 이 두요소중 일부의 부요소에 치환해서 상기 주요소에 직접 결합하는 적어도 1종류의 비가교형원소로 이루어진 비가교요소를 분자구조속에 가진 기체분자를 주성분으로서 함유한 원료가스를 사용해서, 화학적기상성장법에 의해, 반도체기판위에 원료가스의 고화물을 퇴적하는 공정과, 상기 고화물을 가열처리하는 공정을 포함하고, 상기 주요소와 부요소로 구성되는 매트릭스의 그물코가 상기 비가교요소와 부요소와의 치환에 의해서 부분적으로 절단되어서 이루어진 절연막을 상기 반도체기판위에 형성하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제7항에 있어서, 상기 반도체기판위에 원료가스의 고화물을 퇴적하는 공정과, 상기 고화물을 가열 처리하는 공정을 동시에 행하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제7항 또는 제8항에 있어서, 비가교형원소는 할로겐원소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제9항에 있어서, 상기 원료가스의 주성분은, SiH₂F₂ㆍSiH₂CI₂ㆍSiHF 및 SiH₃CI중 적어도 1개로부터 선택하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제9항에 있어서, 상기 원료가스의 주성분은, 하기 분자식F-Si-(OC₂)₃로 표시되는 화합물의 분자인 것을 특징으로 하는 반도체장치의 제조방법.
- 제9항에 있어서, 원료가스는, 하기분자식F₂-Si-(OC₂)₂로 표시되는 화합물의 분자인 것을 특징으로 하는 반도체장치의 제조방법.
- 제9항, 제10항, 제11항 또는 제12항에 있어서, 원료가스에는, 부성분으로서 SiH₄또는 TEOS가 첨가되어 있는 것을 특징으로 하는 반도체장치의 제조방법.
- 제9항, 제10항, 제11항, 제12항 또는 제13항에 있어서, 원료가스에는, 부성분으로서 인소스가스, 붕소소스가스 및 비소소스가스중 적어도 1종류의 가스가 첨가되어 있는 것을 특징으로 하는 반도체장치의 제조방법.
- 반도체기판 위에 적어도 1종류의 원소로 이루어진 주요소와 적어도 1종류의 원소로 이루어진 부요소를 함유한 그물코형상의 매트릭스를 가진 절연막을 구비한 반도체장치의 제조방법으로서, 반도체기판위에, 주요소와 부요소가 그물코형상으로 결합해서 이루어진 매트릭스를 가진 절연막을 형성하는 공정과, 상기 절연막내부에, 상기 주요소에 결합가능한 단일 또는 복수의 비가교형원소로 이루어진 비가교요소를 이온상태로 주입하는 공정과, 상기 비가교요소가 주입된 절연막 열처리하는 공정을 가지고, 반도체기판위에, 상기 비가교요소에 의해서 그물코가 부분적으로 절단된 매트릭스를 가진 절연막을 형성하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제15항에 있어서, 비가교형원소는 할로겐원소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제16항에 있어서, 비가교형원소는 불소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제15항, 제16항 또는 제17항에 있어서, 주요소는 실리콘원자로 이루어지고, 부요소는 산소원자로 이루어지고, 상기 절연막의 매트릭스는, 실리콘원자와 산소원자가 그물코형상으로 결합한 실리콘산화막으로 구성되어 있는 것을 특징으로 하는 반도체장치의 제조방법.
- 제18항에 있어서, 절연막의 매트릭스내부의 주요소중 일부의 주요소를 인, 붕소 및 비소중 적어도 1종류의 원소의 원자와 치환시키는 공정을 포함한 것을 특징으로 하는 반도체장치의 제조방법.
- 제8항, 제9항, 제10항, 제11항, 제12항, 제13항, 제14항, 제15항, 제16항, 제17항 제18항 또는 제19항에 있어서, 절연막은 충간절연막인 것을 특징으로 하는 반도체장치의 제조방법.※ 참고 사항 : 최초출원 내용에 의하여 공개하는 것임.
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EP (1) | EP0562625B1 (ko) |
KR (1) | KR970003724B1 (ko) |
DE (1) | DE69311184T2 (ko) |
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JPH07169833A (ja) * | 1993-12-14 | 1995-07-04 | Nec Corp | 半導体装置及びその製造方法 |
TW302525B (ko) * | 1995-02-28 | 1997-04-11 | Hitachi Ltd | |
KR0179292B1 (ko) * | 1996-04-12 | 1999-04-15 | 문정환 | 반도체소자의 다층배선 형성방법 |
US7763327B2 (en) | 1996-04-22 | 2010-07-27 | Micron Technology, Inc. | Methods using ozone for CVD deposited films |
JP2983476B2 (ja) * | 1996-10-30 | 1999-11-29 | キヤノン販売株式会社 | 成膜方法及び半導体装置の製造方法 |
US5763021A (en) * | 1996-12-13 | 1998-06-09 | Cypress Semiconductor Corporation | Method of forming a dielectric film |
US6077786A (en) * | 1997-05-08 | 2000-06-20 | International Business Machines Corporation | Methods and apparatus for filling high aspect ratio structures with silicate glass |
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JPH11288893A (ja) | 1998-04-03 | 1999-10-19 | Nec Corp | 半導体製造装置及び半導体装置の製造方法 |
US6451714B2 (en) * | 1998-08-26 | 2002-09-17 | Micron Technology, Inc. | System and method for selectively increasing surface temperature of an object |
JP2000077402A (ja) * | 1998-09-02 | 2000-03-14 | Tokyo Electron Ltd | プラズマ処理方法および半導体装置 |
US6727190B2 (en) * | 1998-09-03 | 2004-04-27 | Micron Technology, Inc. | Method of forming fluorine doped boron-phosphorous silicate glass (F-BPSG) insulating materials |
US6159870A (en) * | 1998-12-11 | 2000-12-12 | International Business Machines Corporation | Borophosphosilicate glass incorporated with fluorine for low thermal budget gap fill |
US6261975B1 (en) * | 1999-03-04 | 2001-07-17 | Applied Materials, Inc. | Method for depositing and planarizing fluorinated BPSG films |
CN1301537C (zh) * | 1999-04-16 | 2007-02-21 | 国际商业机器公司 | 制作掺氟的硼磷硅玻璃的方法 |
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US6514876B1 (en) * | 1999-09-07 | 2003-02-04 | Steag Rtp Systems, Inc. | Pre-metal dielectric rapid thermal processing for sub-micron technology |
US6348706B1 (en) * | 2000-03-20 | 2002-02-19 | Micron Technology, Inc. | Method to form etch and/or CMP stop layers |
JP2001284347A (ja) | 2000-03-31 | 2001-10-12 | Canon Sales Co Inc | 成膜方法及び半導体装置の製造方法 |
KR100503951B1 (ko) * | 2003-04-30 | 2005-07-26 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
US20110175184A1 (en) * | 2010-01-21 | 2011-07-21 | Fujifilm Corporation | Solid-state imaging device and method of manufacturing solid-state imaging device |
US20150048477A1 (en) * | 2013-08-16 | 2015-02-19 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
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USB476837I5 (ko) * | 1974-06-06 | 1976-01-20 | ||
US4349584A (en) * | 1981-04-28 | 1982-09-14 | Rca Corporation | Process for tapering openings in ternary glass coatings |
GB8401250D0 (en) * | 1984-01-18 | 1984-02-22 | British Telecomm | Semiconductor fabrication |
US4810673A (en) * | 1986-09-18 | 1989-03-07 | Texas Instruments Incorporated | Oxide deposition method |
JP2557898B2 (ja) * | 1987-07-31 | 1996-11-27 | 株式会社東芝 | 半導体装置 |
US5180692A (en) * | 1988-03-30 | 1993-01-19 | Tokyo Electron Limited | Method for the manufacture of boron-containing films by CVD or epitaxial techniques using boron trifluoride |
US4962063A (en) * | 1988-11-10 | 1990-10-09 | Applied Materials, Inc. | Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing |
EP0712162A2 (en) * | 1989-07-18 | 1996-05-15 | Sony Corporation | A nonvolatile semiconductor memory device and method of manufacturing thereof |
US5314845A (en) * | 1989-09-28 | 1994-05-24 | Applied Materials, Inc. | Two step process for forming void-free oxide layer over stepped surface of semiconductor wafer |
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KR960010334B1 (en) * | 1990-09-25 | 1996-07-30 | Matsushita Electric Ind Co Ltd | Fabricating method of semiconductor device |
JP2864806B2 (ja) * | 1990-09-25 | 1999-03-08 | 松下電器産業株式会社 | 半導体装置の製造方法 |
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JPH04341568A (ja) * | 1991-05-16 | 1992-11-27 | Toshiba Corp | 薄膜形成方法及び薄膜形成装置 |
JPH05226480A (ja) * | 1991-12-04 | 1993-09-03 | Nec Corp | 半導体装置の製造方法 |
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1993
- 1993-03-26 DE DE69311184T patent/DE69311184T2/de not_active Expired - Fee Related
- 1993-03-26 EP EP93105045A patent/EP0562625B1/en not_active Expired - Lifetime
- 1993-03-27 KR KR1019930004873A patent/KR970003724B1/ko not_active IP Right Cessation
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1994
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KR970003724B1 (ko) | 1997-03-21 |
DE69311184D1 (de) | 1997-07-10 |
EP0562625A2 (en) | 1993-09-29 |
DE69311184T2 (de) | 1997-09-18 |
EP0562625B1 (en) | 1997-06-04 |
US5633211A (en) | 1997-05-27 |
EP0562625A3 (ko) | 1995-01-18 |
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