KR930018701A - 피복된 상감(像嵌) 도선 또는 비아(Capped damascene line or via)를 기판상에 제조하는 방법 - Google Patents

피복된 상감(像嵌) 도선 또는 비아(Capped damascene line or via)를 기판상에 제조하는 방법 Download PDF

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KR930018701A
KR930018701A KR1019930000763A KR930000763A KR930018701A KR 930018701 A KR930018701 A KR 930018701A KR 1019930000763 A KR1019930000763 A KR 1019930000763A KR 930000763 A KR930000763 A KR 930000763A KR 930018701 A KR930018701 A KR 930018701A
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metal
substrate
trench
hole
alloy
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조셉 코트 윌리엄
폴 리 페잉
에드윈 샌드위크 토마스
미첼 볼머 베른드
비노리우스 빅터
호워드 울프 스튜어트
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죤 디. 크레인
인터내쇼널 비지네스 머신즈 코포레이션
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
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    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
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    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
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    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]

Abstract

전기적 도전성의 비아와 도선을 3단계 공정으로 형성한다. 첫째, 트렌치 또는 호울이 형성되어 있는 유전체(10)의 상부 표면 아래에 있는 지점까지 트렌치나 호울내에 조절된 적당량의 연성의 저저항성 금속(12)을 침적한다. 계속해서, 저저항성 금속(12)을 CVD 텅스텐 같은 경성금속(16)으로 도포한다. 마지막으로 화학적-기계적으로 상기 구조를 평탄화한다. 강성금속(16)은 저저항성 금속이 거칠은 화학적-기계적 연마 슬러리에 노출될 때 통상적으로 직면하는 긁힘과 침식으로부터 저저항성 금속(12)을 보호하는 기능을 가진다. 기판내의 트렌치나 호울을 부분적으로 채우는 이상적인 방법에서는, 트렌치나 호울의 바닥에 있는 금속 피막이 인접하는 트렌치나 호울의 상부 표면상의 금속 피막으로부터 분리되게 할 정도의 높은 온도로 스퍼터링 한다.
트렌치나 호울내의 금속피막을 인접한 트렌치나 호울의 상부표면상의 금속피막으로부터 분리하는데에는 에치백(etchback) 공정이 사용될 수도 있다. 트렌치 또는 호울은 선택적 침적에 의해 채워질 수도 있다. 더우기, 금속피막(12) 침적을 하기 전에 금속라이너(18)를 트렌치 및 호울의 내부에 도포할 수 있는데, 이 라이너는 확산장벽으로서 작용할 수 있다.

Description

피복된 상감(像嵌) 도선 또는 비아(Capped damascene line or via)를 기판상에 제조하는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3a 내지 3c도는 본 발명에 따른 연마용 보호막(cap)의 제조와 이용을 연속적으로 나타내는 기판의 단면도.
제4a 내지 4c도는 침적중 온도의 영향을 나타내는 기판의 단면도.
제5a 내지 5b도는 유전체층의 표면 바로 밑에까지 저저항성 금속으로 트렌치(trench) 또는 비아를 채우는 두 단계의 공정을 연속으로 나타내는 기판의 단면도.

Claims (14)

  1. 기판내의 트렌치 또는 호울에 저저항을 가지는 연성금속 또는 금속합금을 형성하되, 상기 연성금속 또는 금속합금을 상기 트렌치 또는 호울내에 침적되며 상기 기판의 표면 아래에 위치하는 제1부분과 상기 기판의 상기 표면에 침적되는 제2부분으로 분리시키기에 충분한 온도로 침적하는 단계와; 상기 연성금속 또는 금속 합금상에 경성금속이나 금속합금을 침적하는 단계와; 상기 트렌치 또는 상기 호울내에 각가 형성된 도선 또는 비아가 평탄화되도록 상기 기판의 표면까지 연마하는 단계를 포함하며; 상기 경성금속 또는 상기 호울내에 각각 형성된 도선 또는 비아가 평탄화되도록 상기 기판의 표면까지 연마하는 단계를 포함하며; 상기 경성금속 또는 금속합금을 상기 연성금속 또는 금속 합금을 연마중의 긁힘 및 부식으로부터 보호하는 것을 특징으로 하는 피복된 상감(象嵌)도선 또는 비아를 기판상에 제조하는 방법.
  2. 제1항에 있어서, 상기 연성금속 또는 금속합금의 침적단계를 스퍼터링에 의해 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  3. 제2항에 있어서, 상기 스퍼터링은 시준을 수반하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  4. 제2항에 있어서, 상기 침적단계에서 사용되는 상기 온도가 100℃이상인 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  5. 제1항에 있어서, 상기 연성금속 또는 합금을 침적하는 단계에서 침적되는 상기 연성금속 또는 합금의 표면이 동도를 증가사키는 물질로 상기 트렌치 또는 오울에 라이닝(lining)하는 단계를 더 포함하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  6. 제1항에 있어서, 상기 침적단계에서 사용되는 상기 온도가 100℃이상인 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  7. 제1항에 있어서, 상기 침적단계에서 사용되는 상기 온도는 상기 트렌치 또는 호울안에 있는 상기 연성금속 또는 합금의 상기 제1 부분의 표면 상부가 대체로 평탄해지도록 결정된 것인 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  8. 제1항에 있어서, 상기 강성금속 또는 금속합금의 침적 단계는 화학기상침적법으로 실시하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  9. 제1항에 있어서, 상기 연마단계는 알루미나를 포함하는 산계(acid based)의 화학적-기계적 연마 화합물로 실시하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  10. 제1항에 있어서, 상기 연성금속 또는 합금을 침적하는 단계에서 침적된 상기 연성금속 또는 합금에 대해 확산장벽으로서 작용하는 물질로 상기 트렌치 또는 호울을 라이닝 하는 단계를 더 포함하는 피복된 상감도선 또는 비아를 기판상에 제조하는 방법.
  11. 적어도 하나의 트렌치 또는 호울을 가지는 기판상에 저저항을 가지는 연성금속 또는 합금을 침적하되, 상기 기판의상부 표면 아래에 있는 지점까지 상기 트렌치 또는 호울을 채우는 단계와; 상기 트렌치 또는 호울내의 상기 연성금속 또는 금속합금의 제1부분을 상기 기판의 상기 상부 표면상에 있는 상기 연성금속 또는 금속합금의 제2부분과 연결하는 연성금속 또는 금속합금을 제거하는 단계와; 상기 연성금속 또는 금속합금상에 경성금속 또는 금속합금을 침적하는 단계와; 상기 트렌치 또는 상기 호울내에 각각 형성된 도선 또는 비아가 평탄화되도록 상기 기판의 표면까지 연마하는 단계를 포함하며; 상기 경성금속 또는 금속합금은 상기 연성금속 또는 금속합금을 연마중의 긁힘 및 부식으로부터 보호하는 것을 특징으로 하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  12. 제11항에 있어서, 상기 제거단계를 스퍼터 에칭에 의해 행하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  13. 기판내의 트렌치 또는 호올에 금속 근원층을 침적하는 단계와; 상기 금속 근원층상에 저저항을 가지는 연성금속 또는 금속 합금을 선택적으로 침적하되, 상기 기판의 상부 표면 아래에 있는 지점까지 상기 트렌치나 호올을 채우는 단계와; 상기 연성금속 또는 금속합금상에 경성금속 또는 금속합금을 침적하는 단계와; 상기 트렌치 또는 호올내에 각각 형성된 도선 또는 비아가 평탄화되도록 상기 기판의 표면까지 연마하는 단계를 포함하며; 상기 경성금속 또는 금속합금은 상기 연성금속 또는 금속 합금을 연마중의 긁힘 및 침식으로부터 보호하는 것을 특징으로 하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
  14. 제13항에 있어서, 상기 연성금속이나 금속합금을 선택적으로 침적하는 단계를 성장법에 의해 실시하는 피복된 상감 도선 또는 비아를 기판상에 제조하는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930000763A 1992-02-26 1993-01-21 피복된 상감(象嵌) 도선 또는 비아를 기판상에 제조하는 방법 KR970006973B1 (ko)

Applications Claiming Priority (2)

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US841,693 1992-02-26
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DE69314679D1 (de) 1997-11-27
ATE159615T1 (de) 1997-11-15
TW367599B (en) 1999-08-21
HK1001601A1 (en) 1998-06-26
CN1076547A (zh) 1993-09-22
US5262354A (en) 1993-11-16
KR970006973B1 (ko) 1997-05-01
JP2989408B2 (ja) 1999-12-13
JPH0684826A (ja) 1994-03-25
EP0558004B1 (en) 1997-10-22
CN1027610C (zh) 1995-02-08
EP0558004A2 (en) 1993-09-01
DE69314679T2 (de) 1998-04-02

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