KR930003303A - 플래스틱 핀 그리드 어레이 패키지 제조방법 - Google Patents

플래스틱 핀 그리드 어레이 패키지 제조방법 Download PDF

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KR930003303A
KR930003303A KR1019920012933A KR920012933A KR930003303A KR 930003303 A KR930003303 A KR 930003303A KR 1019920012933 A KR1019920012933 A KR 1019920012933A KR 920012933 A KR920012933 A KR 920012933A KR 930003303 A KR930003303 A KR 930003303A
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electronic device
cavity
metal sheet
conductor
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KR1019920012933A
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KR960003766B1 (ko
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콘 챨스
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오레그이 앨버
아메리칸 텔리폰 앤드 텔레그라프 캄파니
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Abstract

내용 없음.

Description

플래스틱 핀 그리드 어레이 패키지 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 열 싱크 수단을 갖는 플래스틱 핀 그리드 어레이 집적 회로 칩 캐리어 패키지를 도시하는 사시도,
제2도는 제1도의 패키지의 개략 단면도,
제3도는 적층 단계 이전의 열 싱크 부품을 포함하는 상기 패키지 본체의 예비 조립체의 부품을 도시하는 분해 단면도,
제4도는 본체로 적층된후의 예비 조립체 부품의 단면도,
제5도는 도금 관통 구멍(PTHs)이 제공된 제4도의 본체의 단면도,
제6도는 칩을 조립한후, 핀과 피복제 유지 댐을 본체로 조립하기 이전의 IC칩에 대한 오목 공동이 제공된 제5도의 본체를 도시한 도면,
제7도는 핀이 제2도의 그것과는 반대로 하향 돌출되는 제2도의 패키지의 변형예의 개략 도시도,
제8도는 두 와이어 접합 체결 수단을 도시하는 제2도 패키지의 변형예를 도시하는 개략도.

Claims (12)

  1. 상면과 하면을 가지며 상면의 중앙에는 오목 공통이 형성되는 편평한 본체 부재와, 상기 공동 내부에 둘러싸이는 전자 소자와, 이 전자 소자로부터 열을 제거하기 위한 금속재 열 싱크 수단 및 상기 오목 주위에 배치되고 그 일부는 전자 소자상의 패드에 전기 접속되는 다수의 단자 핀을 구비하는 플래스틱 핀 그리드 어레이 패키지 제조 방법으로서, 1)편평한 본체로 적층될 다수의 공통 공간 시트를, C단계 합성 유기 중합체 재질의 상부 및 하부 시트와, 상기 상부 및 하부 시트 사이에 위치하고 이들보다 열전도율이 높으며 단자핀이 전기적 접촉 없이 통과할 필요가 있는 위치에 높으며 단자핀이 전기적 접촉없이 통과할 필요가 있는 위치에 여유 구멍을 갖는 금속재 시트 및 상기 금속재 시트와 상부 및 하부 시트 사이에 각각 위치하는 B단계 합성 유지 중합체 시트를 포함하는 적층 예비 조립체로 조립하는 단계와, 2)상기 적층 예비 조립체에 열과 압력을 가하여 이압력이 B단계 합성 유기중합체를 금속재 시트내의 여유 구멍 내부로 중합체의 플러그 형태로 밀어넣어 적층 본체를 형성하는 단계와, 3)적층 본체의 상면과 하면 사이에서 연장되며 일부는 금속재 시트와 전기 접촉하고 일부는 전기 접촉없이 금속재 시트내의 플러그를 관통하는 다수의 도금 관통 구멍을 상기 본체에 형성하는 단계와, 4)본체의 상면 및 하면에 컨덕터를 형성하는 단계와, 5)본체의 상면에 오목 공동을 형성하여 금속재 시트의 표면을 상기 공동내에서 노출시켜 오목 공동의 기초부로 작용하도록 하는 단계와, 6)마스크를 통해 상기 공동의 노출된 금속재 기초부와 전도체의 공동 인접부를 Ni과 Au로 연이어 전기 도금하는 단계와, 7)상기 도금관통 구멍에 단지 핀을 삽입하여 납땜 고정하는 단계와, 8)전자 소자의 하면을 오목 공동내의 노출된 금속 표면에 접합 고정시키는 단계와, 9)전자 소자의 상면상의 패드를 선정된 도금관통 구멍과 오목 공동의 에지 사이에서 연장되는 본체 상면상의 컨덕터에 전기 접속시키는 단계 및, 10)상기 전자 소자와 전기 전도체의 상기 전자 소자상의 패드와 연결되는 부분을 합성 유기중합체로 피복하는 단계를 포함하는 것을 특징으로 하는 플래스틱 핀 그리드어레이 패키지 제조방법.
  2. 제1항에 있어서, 상기 접합 시트의 두께는 금속재 시트를 상부 및 하부 플래스틱 층의 내면상의 컨덕터로부터 전기 절연시키고 금속재 시트내의 여유 구멍을 충진시키기에 충분한 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  3. 제1항에 있어서, 구성 시트를 예비조립체로 조립하기 이전에 금속층의 상기 선정된 위치에는 여유 구멍이 제공되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  4. 제1항에 있어서, 도금 관통 구멍중 금속재 시트와 전기 접촉하는 구멍내의 일부 단자핀은 금속재 시트로부터의 열 제거를 증대시키는데 사용되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  5. 제1항에 있어서, 상기 단자 핀은 납땜에 의해 도금 관통 구멍에 고정되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  6. 제1항에 있어서, 상부 및 하부 플래스틱 층의 내면상의 금속화 컨덕터가 접합층에 의해 열 싱크 수단으로부터 전기 절연되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  7. 제1항에 있어서, 본체 윗면의 컨덕터 패턴은 각각의 단지 핀으로부터 오목 공동으로 연장되는 일련의 이격된 컨덕터를 포함하는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  8. 제1항에 있어서, 전자소자와, 소자상의 패드를 본체 상면의 컨덕터와 연결하는 와이어 및 컨덕터의 오목 공동과 인접한 부분은 플래스틱 피복제로 피복되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  9. 제8항에 있어서, 상기 피복제는 본체 상면에 피복제 유지 댐내에 유지되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  10. 제8항에 있어서, 전자 소자를 오목 공동내에 설치하기 이전에 피복재 유지 댐이 본체에 설치되는 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  11. 제1항에 있어서, 상기 전자 소자는 집적 회로 반도체 칩인 것을 특징으로 하는 플래스틱 핀 그리드 어레이 패키지 제조방법.
  12. 제1항에 있어서, 두 체결 와이어 접합 설비를 형성할수 있도록 부가의 C단계 합성 유지 중합체 시트와 B단계 합성 중합체 시트가 상부의 C단계 합성 중합체상에 설치되는 것을 특징으로 하는 핀 그리드 어레이 패키지 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920012933A 1991-07-22 1992-07-21 플래스틱 핀 그리드 어레이 패키지 제조 방법 KR960003766B1 (ko)

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US07/733,542 US5102829A (en) 1991-07-22 1991-07-22 Plastic pin grid array package
US733,542 1991-07-22

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