KR920017243A - 바이폴라 트랜지스터 구조 및 bicmos ic 제조방법 - Google Patents
바이폴라 트랜지스터 구조 및 bicmos ic 제조방법 Download PDFInfo
- Publication number
- KR920017243A KR920017243A KR1019920002088A KR920002088A KR920017243A KR 920017243 A KR920017243 A KR 920017243A KR 1019920002088 A KR1019920002088 A KR 1019920002088A KR 920002088 A KR920002088 A KR 920002088A KR 920017243 A KR920017243 A KR 920017243A
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- Prior art keywords
- layer
- collector
- emitter
- bcl
- base
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- 238000004519 manufacturing process Methods 0.000 title description 3
- 125000006850 spacer group Chemical group 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 3
- 239000004065 semiconductor Substances 0.000 claims 2
- 238000009792 diffusion process Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 238000005530 etching Methods 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
- H01L29/0826—Pedestal collectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 바이폴라 트랜지스터 구조를 2차원적으로 단순화한 개략도, 제3도는 CMOS 트랜지스터 구조용 N-웰 한정 개구부분을 지닌 신규한 2.0레트로(retro)N웰 한정 마스크를 보여줌과 아울러 바이폴라 트랜지스터 구조용 SEC한정 개구부분을 지닌 서브에미터-콜렉터 한정 마스크로서의 기능을 하는 BIMOS 제조공정의 2.0마스킹, 에칭 및 주입 단계를 2차원적으로 단순화한 개략도. 제4도는 CMOS트랜지스터 구조용 프레임형 전계 산화물 개구부분을 지닌 6.0 CMOS능동 영역 한정 마스크 또는 전계 산화물 한정 마스크 보여줌과 아울러 바이폴라 트랜지스터 구조용 CBSS한정 개구부분을 지닌 콜렉터-베이스 표면 스페이서 영역 한정 마스크로서의 기능을 하는 신규한 BICMOS제조 공정의 6.0마스킹 및 에칭단계를 2차원적으로 단순화한 개략도.
Claims (1)
- 기판(SUB)상에 데포지트된 반도체 재료의 에피택셜(EPI)층의 표면에서 형성된 콜렉터(C), 베이스(B) 및 에미터(E)를 지니되, 상기 기판내에 형성되어 상기 콜렉터(C), 베이스(B) 및 에미터(E)영역의 기초를 이루는 매몰된 콜렉터 층(BCL)으로서 상기 에피택셜(EPI)층의 반도체 재료에 의해 상기 베이스 및 에미터 영역으로부터 분리된 비교적 느리게 확산하는 BCL N형 원자를 포함하는 매몰된 콜렉터층(BCL), 및 상기 에피택셜층내에 형성되어 상기 콜렉터(C)영역을 상기 매몰된 콜렉터층(BCL)과 전기적으로 연결시키는 콜렉터 싱크(CS)영역을 지니며, 상기 에미터 영역이 이 에미터 영역하부에 있는 능동 베이스 영역층(ABL), 및 상기 콜렉터(C)영역 및 베이스(B)영역을 분리시키는 표면 스페이서(CBSS)영역과 함께 상기 베이스 영역내에 형성되는 집적회로 바이폴라 NPN 트랜지스터 구조에 있어서, 상기 에미터(E)영역 및 능동 베이스 영역층(ABL)의 기초를 이루는 매몰된 콜렉터층(BCL)내에 형성된 서브 에미터-콜렉터(SEC)층으로서 상기 매몰된 콜렉터층(BCL)의 상향에서 상기 에피택셜(EPI)층내로의 역행 농도로 분포된 비교적 빠르게 확산하는 N형 원자를 포함하는 서브 에미터-콜렉터(SEC)층을 포함하여 개선한 집적회로 바이폴라 NPN 트랜지스터 구조.※참고사항:최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US65567691A | 1991-02-14 | 1991-02-14 | |
US91/655,676 | 1991-02-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR920017243A true KR920017243A (ko) | 1992-09-26 |
Family
ID=24629902
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920002088A KR920017243A (ko) | 1991-02-14 | 1992-02-13 | 바이폴라 트랜지스터 구조 및 bicmos ic 제조방법 |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0500233A2 (ko) |
JP (1) | JPH04317369A (ko) |
KR (1) | KR920017243A (ko) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2124843A1 (en) * | 1992-02-25 | 1993-09-02 | James A. Matthews | Bipolar junction transistor exhibiting suppressed kirk effect |
US5374569A (en) * | 1992-09-21 | 1994-12-20 | Siliconix Incorporated | Method for forming a BiCDMOS |
DE69316134T2 (de) * | 1992-09-22 | 1998-06-18 | Nat Semiconductor Corp | Verfahren zur Herstellung eines Schottky-Transistors mit retrogradierter n-Wannenkathode |
EP0613186B1 (en) * | 1993-02-24 | 1997-01-02 | STMicroelectronics S.r.l. | Fully depleted lateral transistor |
US5455189A (en) * | 1994-02-28 | 1995-10-03 | National Semiconductor Corporation | Method of forming BICMOS structures |
EP0698283A1 (en) * | 1994-03-15 | 1996-02-28 | National Semiconductor Corporation | A semiconductor device having a self-aligned p-well within a p-buried-layer |
DE69522926T2 (de) * | 1995-05-02 | 2002-03-28 | St Microelectronics Srl | Resurf-IC mit dünner Epitaxialschicht für HV-P-Kanal und N-Kanal-Anordnungen wobei Source und Drain nicht an Erdungspotential gelegt sind |
WO1997017726A1 (en) * | 1995-11-07 | 1997-05-15 | National Semiconductor Corporation | Low collector resistance bipolar transistor compatible with high voltage integrated circuits |
WO1997023908A1 (en) * | 1995-12-21 | 1997-07-03 | Philips Electronics N.V. | Bicmos semiconductor device comprising a silicon body with locos and oxide filled groove regions for insulation |
DE10002129B4 (de) * | 2000-01-19 | 2006-10-26 | Infineon Technologies Ag | Vertikale DMOS-Transistoranordnung mit niedrigem Einschaltwiderstand |
DE10044838C2 (de) * | 2000-09-11 | 2002-08-08 | Infineon Technologies Ag | Halbleiterbauelement und Verfahren zur Herstellung eines solchen |
DE10162074B4 (de) * | 2001-12-06 | 2010-04-08 | Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik | BiCMOS-Struktur, Verfahren zu ihrer Herstellung und Bipolartransistor für eine BiCMOS-Struktur |
ES2375302T3 (es) | 2005-05-24 | 2012-02-28 | Dsm Ip Assets B.V. | Derivados de ligustilida para el tratamiento de trastornos inflamatorios. |
JP5048242B2 (ja) * | 2005-11-30 | 2012-10-17 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
KR20090033470A (ko) | 2006-07-14 | 2009-04-03 | 디에스엠 아이피 어셋츠 비.브이. | 로즈힙 및 다른 활성 약품을 포함하는, 염증성 질환의 치료를 위한 조성물 |
CN102130163B (zh) * | 2010-01-18 | 2013-01-09 | 上海华虹Nec电子有限公司 | Esd高压dmos器件及其制造方法 |
-
1992
- 1992-02-06 EP EP92300994A patent/EP0500233A2/en not_active Withdrawn
- 1992-02-13 KR KR1019920002088A patent/KR920017243A/ko not_active Application Discontinuation
- 1992-02-14 JP JP4027579A patent/JPH04317369A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH04317369A (ja) | 1992-11-09 |
EP0500233A2 (en) | 1992-08-26 |
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