KR920001690A - 수지봉지형 반도체장치 - Google Patents

수지봉지형 반도체장치 Download PDF

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Publication number
KR920001690A
KR920001690A KR1019910008853A KR910008853A KR920001690A KR 920001690 A KR920001690 A KR 920001690A KR 1019910008853 A KR1019910008853 A KR 1019910008853A KR 910008853 A KR910008853 A KR 910008853A KR 920001690 A KR920001690 A KR 920001690A
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South Korea
Prior art keywords
semiconductor device
semiconductor
wiring pattern
lead frame
semiconductor element
Prior art date
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KR1019910008853A
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English (en)
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KR950005446B1 (ko
Inventor
마꼬또 기따노
아사오 니시무라
아끼히로 야구찌
류지 고노
나에 요네다
Original Assignee
미다 가쓰시게
가부시끼가이샤 히다찌세이사꾸쇼
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Publication of KR920001690A publication Critical patent/KR920001690A/ko
Application granted granted Critical
Publication of KR950005446B1 publication Critical patent/KR950005446B1/ko

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Abstract

내용 없음.

Description

수지봉지형 반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 관한 반도체장치의 부분단면 사시도.
제2도는 제 1실시예에 관한 반도체장치의 단면도.
제3도는 제1실시예에 관한 반도체장치의 전극 부근의 확대단면도.
제4도는 제1실시예에 관한 반도체장치의 패케이지 측면 부근의 확대단면도.
제5도는 제1실시예에 관한 반도체장치의 제조방법을 도시한 설명도.
제6도, 제7도, 제8도, 제9도, 제10도, 제11도는 모두 제1실시예에 관한 반도체장치를 부분적으로 변경한 실시예 장치의 단면도.
제12도는 본 발명의 제2실시예에 관한 반도체장치의 부분확대 단면도.
제13도는 제2실시예에 관한 반도체장치를 부분적으로 변경한 실시예 장치의 부분확대 단면도.
제14도는 본 발명의 제3실시예에 관한 반도체장치의 부분확대 단면도.
제15도는 본 발명의 제4실시예에 관한 반도체장치의 부분확대 단면도.
제16도는 본 발명의 제5실시예에 관한 반도체장치의 부분확대 단면도.
제17도는 종래의 리이드 온 칩 구조의 내부를 도시한 사시도.
제18도는 64메가비트 DRAM의 최적 설계의 레이아우트 평면도.
제19도, 제20도는 모두 본딩 패드와 내부리이드의 전기적 접속의 설명도.

Claims (23)

  1. 반도체소자, 리이드의 집합체로 이루어지는 리이드 프레임 및 상기 반도체소자와 상기 리이드 프레임을 전기적으로 접속하는 수단을 마련하고, 상기 리이드 프레임의 일부, 상기 반도체소자 및 전기적 접속부분을 수지로 봉지하는 것에 의해 패케이지를 형성한 반도체장치에 있어서, 상기 반도체소자를 2매 사용하고, 상기 2매의 반도체소자의 회로 형성면이 대향하고 있고, 각각의 상기 반도체소자의 회로형성면상의 전극을 제외한 부분의 적어도 일부분에 절연필름을 마련하고, 각각의 상기 반도체소자의 상기 절연필름상에 금속의 배선패턴을 형성하고, 상기 배선패턴과 각각의 상기 반도체소자의 상기 전극을 와이어에 의해 전기적으로 접속하고, 2매의 상기 반도체소자 사이에 상기 리이드 프레임을 삽입하여 상기 배선패턴과 상기 리이드 프레임을 전기적으로 접속한 수지봉지형 반도체장치.
  2. 특허청구의 범위 제1항에 있어서, 상기 배선패턴과 리이드 프레임을 땜납에 의해 전기적으로 접속한 반도체장치.
  3. 특허청구의 범위 제2항에 있어서, 상기 땜납의 융점이 250℃ 이상인 반도체장치.
  4. 특허청구의 범위 제1항에 있어서, 상기 배선패턴과 상기 리이드 프레임을 도전성 수지에 의해 전기적으로 접속한 반도체장치.
  5. 특허청구의 범위 제1항에 있어서, 상기 반도체소자의 장방형이고, 상기 반도체소자의 전극이 상기 반도체소자의 2개의 중심선중 적어도 하나의 중심선의 근방에 배치되어 있는 반도체장치.
  6. 특허청구의 범위 제1항에 있어서, 상기 반도체소자의 메모리 LSI인 반도체장치.
  7. 특허청구의 범위 제1항에 있어서, 상기 배선패턴이 금속박인 반도체장치.
  8. 반도체소자, 리이드의 집합체로 이루어지는 리이드 프레임 및 상기 반도체소자와 상기 리이드 프레임을 전기적으로 접속하는 수단을 마련하고, 상기 라이드 프레임의 일부, 상기 반도체소자 및 전기적 접속부분을 봉지하는 것에 의해 패케이지를 형성한 반도체장치에 있어서, 상기 반도체소자를 2매 사용하고, 상기 2매의 반도체소자의 회로 형성면이 대향하고 있고, 각각의 상기 반도체소자의 회로형성면상의 전극을 제외한 부분의 적어도 일부분에 절연필름을 마련하고, 각각의 상기 반도체소자의 상기 절연필름상에 금속의 배선패턴을 형성하고, 상기 배선패턴과 각각의 상기 반도체소자의 상기 전극을 전기적으로 접속하고, 2매의 상기 반도체소자 사이에 상기 리이드 프레임을 삽입하여 상기 배선패턴과 상기 리이드 프레임을 전기적으로 접속하고, 상기 배선패턴과 상기 반도체소자를 전기적으로 접속하는 부분 및 상기 반도체소자의 회로형성면에서 필름으로 피복되어 있지 않은 부분의 적어도 일부를 제1의 봉지수지로 피복하고, 상기 리이드 프레임의 일부와 이들 구성부재를 제2의 수지로 봉지한 반도체장치.
  9. 특허청구의 범위 제8항에 있어서, 상기 반도체소자의 전극과 상기 배선패턴을 와이어에 의해 전기적으로 접속한 반도체장치.
  10. 특허청구의 범위 제8항에 있어서, 상기 배선패턴의 금속의 일부분을 상기 절연필름에서 돌출시키고, 이 부분의 금속과 상기 반도체소자의 전극을 열압착에 의해 전기적으로 접속한 반도체장치.
  11. 특허청구의 범위 제8항에 있어서, 상기 배선패턴과 리이드 프레임을 땜납에 의해 전기적으로 접속한 반도체장치.
  12. 특허청구의 범위 제11항에 있어서, 상기 땜납의 융점이 250℃ 이상인 반도체장치.
  13. 특허청구의 범위 제8항에 있어서, 상기 배선패턴과 상기 리이드 프레임을 도전성 수지에 의해 전기적으로 접속한 반도체장치.
  14. 특허청구의 범위 제8항에 있어서, 상기 반도체소자가 장방형이고, 상기 반도체소자의 전극이 상기 반도체소자의 2개의 중심선중 적어도 하나의 중심선의 근방에 배치되어 있는 반도체장치.
  15. 특허청구의 범위 제8항에 있어서, 상기 반도체소자가 메모리 LSI인 반도체장치.
  16. 특허청구의 범위 제8항에 있어서, 상기 배선패턴이 금속박인 반도체장치.
  17. 반도체소자, 리이드의 집합체로 이루어지는 리이드 프레임 및 상기 반도체소자와 상기 리이드 프레임을 전기적으로 접속하는 수단을 마련하고, 상기 리이드 프레임의 일부, 상기 반도체소자 및 전기적 접속부분을 수지로 봉지하는 것에 의해 패케이지를 형성한 반도체장치에 있어서, 상기 반도체소자를 2매 사용하고, 상기 2매의 반도체소자의 회로 형성면이 대향하고 있고, 각각의 상기 반도체소자의 회로형성면상의 전극을 제외한 부분의 적어도 일부분에 절연필름을 마련하고, 각각의 상기 반도체소자의 상기 절연필름상에 금속의 배선패턴을 형성하고, 상기 배선패턴의 금속의 일부분을 상기 절연필름에서 돌출시키고 이 부분의 금속과 상기 반도체소자의 전극을 열압착에 의해 전기적으로 접속하고, 2매의 상기 반도체소자 사이에 상기 리이드 프레임을 삽입하여 상기 배선패턴과 상기 리이드 프레임을 전기적으로 접속한 수지봉지형 반도체장치.
  18. 특허청구의 범위 제17항에 있어서, 상기 배선패턴과 리이드 프레임을 땜납에 의해 전기적으로 접속한 반도체장치.
  19. 특허청구의 범위 제18항에 있어서, 상기 땜납의 융점이 250℃ 이상인 반도체장치.
  20. 특허청구의 범위 제17항에 있어서, 상기 배선패턴과 상기 리이드 프레임을 도전성 수지에 의해 전기적으로 접속한 반도체장치.
  21. 특허청구의 범위 제17항에 있어서, 상기 반도체소자가 장방형이고, 상기 반도체소자의 전극이 상기 반도체소자의 2개의 중심선중 적어도 하나의 중심선의 근방에 배치되어 있는 반도체장치.
  22. 특허청구의 범위 제17항에 있어서, 상기 반도체소자가 메모리 LSI인 반도체장치.
  23. 특허청구의 범위 제17항에 있어서, 상기 배선패턴이 금속박인 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910008853A 1990-06-15 1991-05-30 수지봉지형 반도체장치 KR950005446B1 (ko)

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JP2155167A JP2816239B2 (ja) 1990-06-15 1990-06-15 樹脂封止型半導体装置
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JP2708191B2 (ja) * 1988-09-20 1998-02-04 株式会社日立製作所 半導体装置
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EP0461639B1 (en) 1997-09-10
EP0461639A3 (en) 1993-09-22
JP2816239B2 (ja) 1998-10-27
US5539250A (en) 1996-07-23
EP0461639A2 (en) 1991-12-18
DE69127587D1 (de) 1997-10-16
KR950005446B1 (ko) 1995-05-24
DE69127587T2 (de) 1998-04-23
JPH0448767A (ja) 1992-02-18

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