KR910013034A - 액정표시장치의 구동회로 - Google Patents

액정표시장치의 구동회로 Download PDF

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Publication number
KR910013034A
KR910013034A KR1019900019908A KR900019908A KR910013034A KR 910013034 A KR910013034 A KR 910013034A KR 1019900019908 A KR1019900019908 A KR 1019900019908A KR 900019908 A KR900019908 A KR 900019908A KR 910013034 A KR910013034 A KR 910013034A
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KR
South Korea
Prior art keywords
circuit
liquid crystal
crystal display
display device
comparison data
Prior art date
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KR1019900019908A
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English (en)
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KR940002295B1 (ko
Inventor
후꾸다 히데노리
Original Assignee
쓰지 하루오
샤프 가부시끼가이샤
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Publication of KR910013034A publication Critical patent/KR910013034A/ko
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Publication of KR940002295B1 publication Critical patent/KR940002295B1/ko

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

내용 없음.

Description

액정표시장치의 구동회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예를 나타내고 있는 블럭도이고,
제2도 (A)와 (B)는 시프트 레지스터, 래치회로 및 변환회로의 구조를 나타내고 있는 회로도이며,
제3도는 상기 실시예에서의 변환회로를 나타내고 있는 회로도이다.

Claims (5)

  1. 박막 트랜지스터 매트릭스 어레이를 구비하는 액티브 매트릭스형 액정표시장치의 소오스라인을 구동하는 액정표시장치의 구동회로에 있어서, 한 라인의 디지탈 비데오 신호를 순차적으로 저장하되 상기 각각의 디지탈 비데오 신호가 일련의 소정비트의 화소데이터로 구성되어 있는 시프트 레지스터 회로와, 상기 시프트레지스터 회로에 저장된 한 라인의 디지탈 비데오 신호를 하나의 수평주기 동안 유지하는 래치회로와, 상기 래치회로로부터 출력된 한라인의 디지탈 비데오 신호를 구성하는 각 화소데이터를 상부 및 하부비트로 분류하고, 상기의 상부비트로 지정된 값에 따라 근접하는 두개의 상이한 DC전압을 선택하며, 그리고 상기의 하부비트로 지정된 값에 따라 상기 두개의 상이한 DC전압 사이에서 펄스폭 변조를 실행함과 동시에 상기 매트릭스 어레이의 대응 소오스라인으로 아날로그 비데오 신호를 제공하는 변환회로 및, 상기의 하부비트와 동일한 수의 비트를 갖는 비교 데이터를 출력하되 상기의 비교데이터가 상기 변환 회로의 하부비트와 비교되는 비교데이터 발생회로로 구성하는 것을 특징으로 하는 액정 표시장치의 구동회로.
  2. 제1항에 있어서, 상기의 변환회로는 한 라인의 화소데이터의 수와 대응 하는 수의 유니트회로를 구비하여, 상기 유니트회로는 상기 두개의 상이한 DC전압을 선택하는 스위칭회로와, 상기 하부비트를 상기의 비교데이터 발생회로로부터 출력되는 비교 데이터와 비교함과 동시에 비교의 결과에 대응하는 상이한 펄스폭을 갖는 신호를 출력하는 펄스폭 변조기와, 상기 펄스폭 변조기로 부터 출력된 신호에 응답하여 상기 스위칭회로로 부터 출력된 상기 두 개의 상이한 DC전압을 각각 스위칭하는 두개의 스위칭 소자와, 그리고 상기의 각 스위칭소자로부터 출력된 신호에 응답하여 아날로그 화소신호를 출력하는 적분회로로 구성됨을 특징으로 하는 액정 표시장치의 구동회로.
  3. 제1항에 있어서, 상기의 비교데이터 바라생회로는 4개의 D플립플롭을 직렬로 접속하여 구성된 16진 카운터인 것을 특징으로 하는 액정표시장치의 구동회로.
  4. 제2항에 있어서, 상기의 펄스폭 변조기는 4비트 비교기이고 그리고 상기의 비교데이터 발생회로는 4개의 D플립플롭을 직렬로 접속하여 구성된 16진 카운터인 것을 특징으로 하는 액정표시 장치의 구동회로.
  5. 제2항에 있어서, 상기의 스위칭소자는 N채널 및 P채널의 FET인 것을 특징으로 하는 액정표시장치의 구동회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900019908A 1989-12-14 1990-12-05 액정표시장치의 구동회로 KR940002295B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1-324639 1989-12-14
JP1324639A JP2642204B2 (ja) 1989-12-14 1989-12-14 液晶表示装置の駆動回路

Publications (2)

Publication Number Publication Date
KR910013034A true KR910013034A (ko) 1991-08-08
KR940002295B1 KR940002295B1 (ko) 1994-03-21

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Country Status (10)

Country Link
US (1) US5162786A (ko)
EP (1) EP0433054B1 (ko)
JP (1) JP2642204B2 (ko)
KR (1) KR940002295B1 (ko)
CN (1) CN1021382C (ko)
AU (1) AU617258B2 (ko)
BR (1) BR9006329A (ko)
DE (1) DE69021027T2 (ko)
ES (1) ES2074143T3 (ko)
MY (1) MY105389A (ko)

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Also Published As

Publication number Publication date
ES2074143T3 (es) 1995-09-01
US5162786A (en) 1992-11-10
EP0433054A3 (en) 1992-08-05
KR940002295B1 (ko) 1994-03-21
MY105389A (en) 1994-09-30
EP0433054B1 (en) 1995-07-19
DE69021027T2 (de) 1996-01-25
AU6771290A (en) 1991-08-29
CN1021382C (zh) 1993-06-23
CN1052565A (zh) 1991-06-26
JPH03184018A (ja) 1991-08-12
DE69021027D1 (de) 1995-08-24
EP0433054A2 (en) 1991-06-19
JP2642204B2 (ja) 1997-08-20
BR9006329A (pt) 1991-09-24
AU617258B2 (en) 1991-11-21

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