KR910009810B1 - Cmos 입력 버퍼 회로 - Google Patents

Cmos 입력 버퍼 회로 Download PDF

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Publication number
KR910009810B1
KR910009810B1 KR1019890007106A KR890007106A KR910009810B1 KR 910009810 B1 KR910009810 B1 KR 910009810B1 KR 1019890007106 A KR1019890007106 A KR 1019890007106A KR 890007106 A KR890007106 A KR 890007106A KR 910009810 B1 KR910009810 B1 KR 910009810B1
Authority
KR
South Korea
Prior art keywords
mos transistor
current
temperature
supply line
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019890007106A
Other languages
English (en)
Korean (ko)
Other versions
KR900019380A (ko
Inventor
정태성
Original Assignee
삼성전자 주식회사
김광호
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 김광호 filed Critical 삼성전자 주식회사
Priority to KR1019890007106A priority Critical patent/KR910009810B1/ko
Priority to JP1183539A priority patent/JP2651246B2/ja
Priority to NLAANVRAGE8902048,A priority patent/NL190137C/xx
Priority to DE3926657A priority patent/DE3926657A1/de
Priority to FR898910965A priority patent/FR2647608B1/fr
Priority to GB8918991A priority patent/GB2232311B/en
Publication of KR900019380A publication Critical patent/KR900019380A/ko
Application granted granted Critical
Publication of KR910009810B1 publication Critical patent/KR910009810B1/ko
Expired legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021—Modifications of threshold
    • H03K19/0027—Modifications of threshold in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
KR1019890007106A 1989-05-27 1989-05-27 Cmos 입력 버퍼 회로 Expired KR910009810B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019890007106A KR910009810B1 (ko) 1989-05-27 1989-05-27 Cmos 입력 버퍼 회로
JP1183539A JP2651246B2 (ja) 1989-05-27 1989-07-15 Ｃｍｏｓ入力バッファ回路
NLAANVRAGE8902048,A NL190137C (nl) 1989-05-27 1989-08-11 Cmos ingangsbuffercircuit, met compensatiemiddelen voor het compenseren van temperatuurinvloeden op circuitkarakteristieken.
DE3926657A DE3926657A1 (de) 1989-05-27 1989-08-11 Cmos-eingangspufferschaltung
FR898910965A FR2647608B1 (fr) 1989-05-27 1989-08-17 Circuit separateur d'entree cmos
GB8918991A GB2232311B (en) 1989-05-27 1989-08-21 CMOS input buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890007106A KR910009810B1 (ko) 1989-05-27 1989-05-27 Cmos 입력 버퍼 회로

Publications (2)

Publication Number Publication Date
KR900019380A KR900019380A (ko) 1990-12-24
KR910009810B1 true KR910009810B1 (ko) 1991-11-30

Family

ID=19286514

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890007106A Expired KR910009810B1 (ko) 1989-05-27 1989-05-27 Cmos 입력 버퍼 회로

Country Status (6)

Country Link
JP (1) JP2651246B2 (enrdf_load_stackoverflow)
KR (1) KR910009810B1 (enrdf_load_stackoverflow)
DE (1) DE3926657A1 (enrdf_load_stackoverflow)
FR (1) FR2647608B1 (enrdf_load_stackoverflow)
GB (1) GB2232311B (enrdf_load_stackoverflow)
NL (1) NL190137C (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19910352C1 (de) * 1999-03-09 2000-06-15 Siemens Ag Kompensationsschaltung für Treiberschaltungen
DE10151020A1 (de) 2001-10-16 2003-04-30 Infineon Technologies Ag Schaltkreis-Anordnung, Sensor-Array und Biosensor-Array
US7495483B2 (en) * 2005-06-30 2009-02-24 Stmicroelectronics Pvt. Ltd. Input buffer for CMOS integrated circuits
JP4812450B2 (ja) * 2006-02-07 2011-11-09 富士通コンポーネント株式会社 高速伝送用コネクタ
JP4747081B2 (ja) * 2006-12-06 2011-08-10 株式会社オートネットワーク技術研究所 シールドコネクタ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772429A (en) * 1980-10-22 1982-05-06 Toshiba Corp Semiconductor integrated circuit device
US4717836A (en) * 1986-02-04 1988-01-05 Burr-Brown Corporation CMOS input level shifting circuit with temperature-compensating n-channel field effect transistor structure
JPS62224117A (ja) * 1986-03-26 1987-10-02 Hitachi Micro Comput Eng Ltd 信号出力回路
JPS63226110A (ja) * 1987-03-16 1988-09-20 Fujitsu Ltd ヒステリシスインバ−タ回路
JPS6441521A (en) * 1987-08-08 1989-02-13 Mitsubishi Electric Corp Threshold level switching circuit
JPS6486614A (en) * 1987-09-29 1989-03-31 Nec Corp Mos input buffer
JPH01126822A (ja) * 1987-11-12 1989-05-18 Kawasaki Steel Corp プログラマブル入力回路
JPH01286619A (ja) * 1988-05-13 1989-11-17 Nec Corp 入力回路

Also Published As

Publication number Publication date
FR2647608B1 (fr) 1994-11-10
FR2647608A1 (fr) 1990-11-30
GB2232311A (en) 1990-12-05
GB2232311B (en) 1994-03-02
JP2651246B2 (ja) 1997-09-10
JPH0311823A (ja) 1991-01-21
DE3926657C2 (enrdf_load_stackoverflow) 1991-07-25
DE3926657A1 (de) 1990-11-29
NL190137B (nl) 1993-06-01
KR900019380A (ko) 1990-12-24
NL8902048A (nl) 1990-12-17
GB8918991D0 (en) 1989-10-04
NL190137C (nl) 1993-11-01

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