GB2232311B - CMOS input buffer circuit - Google Patents

CMOS input buffer circuit

Info

Publication number
GB2232311B
GB2232311B GB8918991A GB8918991A GB2232311B GB 2232311 B GB2232311 B GB 2232311B GB 8918991 A GB8918991 A GB 8918991A GB 8918991 A GB8918991 A GB 8918991A GB 2232311 B GB2232311 B GB 2232311B
Authority
GB
United Kingdom
Prior art keywords
buffer circuit
input buffer
cmos input
cmos
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB8918991A
Other versions
GB8918991D0 (en
GB2232311A (en
Inventor
Tae-Sung Jeong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB8918991D0 publication Critical patent/GB8918991D0/en
Publication of GB2232311A publication Critical patent/GB2232311A/en
Application granted granted Critical
Publication of GB2232311B publication Critical patent/GB2232311B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021—Modifications of threshold
    • H03K19/0027—Modifications of threshold in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
GB8918991A 1989-05-27 1989-08-21 CMOS input buffer circuit Expired - Lifetime GB2232311B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890007106A KR910009810B1 (en) 1989-05-27 1989-05-27 Cmos input buffer circuit

Publications (3)

Publication Number Publication Date
GB8918991D0 GB8918991D0 (en) 1989-10-04
GB2232311A GB2232311A (en) 1990-12-05
GB2232311B true GB2232311B (en) 1994-03-02

Family

ID=19286514

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8918991A Expired - Lifetime GB2232311B (en) 1989-05-27 1989-08-21 CMOS input buffer circuit

Country Status (6)

Country Link
JP (1) JP2651246B2 (en)
KR (1) KR910009810B1 (en)
DE (1) DE3926657A1 (en)
FR (1) FR2647608B1 (en)
GB (1) GB2232311B (en)
NL (1) NL190137C (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19910352C1 (en) * 1999-03-09 2000-06-15 Siemens Ag Digitally controlled compensation unit for driver circuit used for input=output pad cells of integrated circuit
DE10151020A1 (en) 2001-10-16 2003-04-30 Infineon Technologies Ag Circuit arrangement, sensor array and biosensor array
US7495483B2 (en) * 2005-06-30 2009-02-24 Stmicroelectronics Pvt. Ltd. Input buffer for CMOS integrated circuits
JP4812450B2 (en) * 2006-02-07 2011-11-09 富士通コンポーネント株式会社 High-speed transmission connector
JP4747081B2 (en) * 2006-12-06 2011-08-10 株式会社オートネットワーク技術研究所 Shield connector

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772429A (en) * 1980-10-22 1982-05-06 Toshiba Corp Semiconductor integrated circuit device
US4717836A (en) * 1986-02-04 1988-01-05 Burr-Brown Corporation CMOS input level shifting circuit with temperature-compensating n-channel field effect transistor structure
JPS62224117A (en) * 1986-03-26 1987-10-02 Hitachi Micro Comput Eng Ltd Signal output circuit
JPS63226110A (en) * 1987-03-16 1988-09-20 Fujitsu Ltd Hysteresis inverter circuit
JPS6441521A (en) * 1987-08-08 1989-02-13 Mitsubishi Electric Corp Threshold level switching circuit
JPS6486614A (en) * 1987-09-29 1989-03-31 Nec Corp Mos input buffer
JPH01126822A (en) * 1987-11-12 1989-05-18 Kawasaki Steel Corp Programmable input circuit
JPH01286619A (en) * 1988-05-13 1989-11-17 Nec Corp Input circuit

Also Published As

Publication number Publication date
FR2647608A1 (en) 1990-11-30
NL8902048A (en) 1990-12-17
GB8918991D0 (en) 1989-10-04
JPH0311823A (en) 1991-01-21
GB2232311A (en) 1990-12-05
JP2651246B2 (en) 1997-09-10
KR900019380A (en) 1990-12-24
DE3926657A1 (en) 1990-11-29
KR910009810B1 (en) 1991-11-30
FR2647608B1 (en) 1994-11-10
NL190137C (en) 1993-11-01
NL190137B (en) 1993-06-01
DE3926657C2 (en) 1991-07-25

Similar Documents

Publication Publication Date Title
GB2228110B (en) Cmos voltage reference and buffer circuit
EP0454135A3 (en) Mos type input circuit
GB2246885B (en) Data output buffer circuit
KR960009739B1 (en) Differential input circuit
GB9119002D0 (en) Buffer circuit
EP0446595A3 (en) A buffer circuit
GB9028237D0 (en) Signal delay circuit
EP0275941A3 (en) Ecl-compatible cmos input/output circuits ecl-compatible cmos input/output circuits
EP0542227A3 (en) Output buffer circuit
DE3373963D1 (en) Input buffer circuit
EP0410479A3 (en) Emitter-follower circuit
GB8811702D0 (en) Buffer circuit
GB8811699D0 (en) Buffer circuit
GB2207319B (en) Buffer circuit
EP0239939A3 (en) Input circuit
EP0472426A3 (en) Cmos flip-flop circuit
GB2246037B (en) Delay circuit
EP0527513A3 (en) Input buffer circuit
EP0481093A4 (en) Delay circuit
GB2232311B (en) CMOS input buffer circuit
GB8711208D0 (en) Input buffer circuit arrangement
GB2244185B (en) Attenuating circuit
GB2233519B (en) A buffer circuit
EP0451857A3 (en) Input matching circuit
EP0244587A3 (en) Complementary input circuit

Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20090820