GB8711208D0 - Input buffer circuit arrangement - Google Patents
Input buffer circuit arrangementInfo
- Publication number
- GB8711208D0 GB8711208D0 GB878711208A GB8711208A GB8711208D0 GB 8711208 D0 GB8711208 D0 GB 8711208D0 GB 878711208 A GB878711208 A GB 878711208A GB 8711208 A GB8711208 A GB 8711208A GB 8711208 D0 GB8711208 D0 GB 8711208D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- circuit arrangement
- buffer circuit
- input buffer
- input
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61116914A JPS62272722A (en) | 1986-05-21 | 1986-05-21 | Ttl logic level cmos input buffer |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8711208D0 true GB8711208D0 (en) | 1987-06-17 |
GB2192106A GB2192106A (en) | 1987-12-31 |
Family
ID=14698780
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08711208A Withdrawn GB2192106A (en) | 1986-05-21 | 1987-05-12 | TTL to CMOS interface using clocked latch |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS62272722A (en) |
DE (1) | DE3715655A1 (en) |
FR (1) | FR2599199A1 (en) |
GB (1) | GB2192106A (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4837465A (en) * | 1985-01-16 | 1989-06-06 | Digital Equipment Corp | Single rail CMOS register array and sense amplifier circuit therefor |
IT1201860B (en) * | 1986-12-10 | 1989-02-02 | Sgs Microelettronica Spa | LOGIC CIRCUIT CMOS |
JPH01178197A (en) * | 1988-01-08 | 1989-07-14 | Oki Electric Ind Co Ltd | Input buffer |
IT1244205B (en) * | 1990-12-19 | 1994-07-08 | Sgs Thomson Microelectronics | SCAN CLOCK GENERATION CIRCUIT IN A SERIAL OPERATIONAL ANALYSIS DEVICE FOR INTEGRATED CIRCUIT |
JP3550168B2 (en) * | 1993-09-22 | 2004-08-04 | 沖電気工業株式会社 | Semiconductor storage device |
JP3678533B2 (en) * | 1997-04-10 | 2005-08-03 | 富士通株式会社 | Charged particle beam exposure system |
CN104967437B (en) * | 2015-07-01 | 2018-02-06 | 东南大学 | Silicon substrate low-leakage current cantilever beam grid cmos transmission gate and preparation method |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3573498A (en) * | 1967-11-24 | 1971-04-06 | Rca Corp | Counter or shift register stage having both static and dynamic storage circuits |
US4485317A (en) * | 1981-10-02 | 1984-11-27 | Fairchild Camera & Instrument Corp. | Dynamic TTL input comparator for CMOS devices |
US4496857A (en) * | 1982-11-01 | 1985-01-29 | International Business Machines Corporation | High speed low power MOS buffer circuit for converting TTL logic signal levels to MOS logic signal levels |
-
1986
- 1986-05-21 JP JP61116914A patent/JPS62272722A/en active Pending
-
1987
- 1987-05-11 DE DE19873715655 patent/DE3715655A1/en not_active Withdrawn
- 1987-05-12 GB GB08711208A patent/GB2192106A/en not_active Withdrawn
- 1987-05-20 FR FR8707086A patent/FR2599199A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
FR2599199A1 (en) | 1987-11-27 |
GB2192106A (en) | 1987-12-31 |
DE3715655A1 (en) | 1987-11-26 |
JPS62272722A (en) | 1987-11-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |