NL190137C - Cmos ingangsbuffercircuit, met compensatiemiddelen voor het compenseren van temperatuurinvloeden op circuitkarakteristieken. - Google Patents

Cmos ingangsbuffercircuit, met compensatiemiddelen voor het compenseren van temperatuurinvloeden op circuitkarakteristieken.

Info

Publication number
NL190137C
NL190137C NLAANVRAGE8902048,A NL8902048A NL190137C NL 190137 C NL190137 C NL 190137C NL 8902048 A NL8902048 A NL 8902048A NL 190137 C NL190137 C NL 190137C
Authority
NL
Netherlands
Prior art keywords
circuit
compensators
input buffer
temperature influences
cmos input
Prior art date
Application number
NLAANVRAGE8902048,A
Other languages
English (en)
Other versions
NL190137B (nl
NL8902048A (nl
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of NL8902048A publication Critical patent/NL8902048A/nl
Publication of NL190137B publication Critical patent/NL190137B/nl
Application granted granted Critical
Publication of NL190137C publication Critical patent/NL190137C/nl

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021Modifications of threshold
    • H03K19/0027Modifications of threshold in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00369Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
NLAANVRAGE8902048,A 1989-05-27 1989-08-11 Cmos ingangsbuffercircuit, met compensatiemiddelen voor het compenseren van temperatuurinvloeden op circuitkarakteristieken. NL190137C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019890007106A KR910009810B1 (ko) 1989-05-27 1989-05-27 Cmos 입력 버퍼 회로
KR890007106 1989-05-27

Publications (3)

Publication Number Publication Date
NL8902048A NL8902048A (nl) 1990-12-17
NL190137B NL190137B (nl) 1993-06-01
NL190137C true NL190137C (nl) 1993-11-01

Family

ID=19286514

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE8902048,A NL190137C (nl) 1989-05-27 1989-08-11 Cmos ingangsbuffercircuit, met compensatiemiddelen voor het compenseren van temperatuurinvloeden op circuitkarakteristieken.

Country Status (6)

Country Link
JP (1) JP2651246B2 (nl)
KR (1) KR910009810B1 (nl)
DE (1) DE3926657A1 (nl)
FR (1) FR2647608B1 (nl)
GB (1) GB2232311B (nl)
NL (1) NL190137C (nl)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19910352C1 (de) * 1999-03-09 2000-06-15 Siemens Ag Kompensationsschaltung für Treiberschaltungen
DE10151020A1 (de) * 2001-10-16 2003-04-30 Infineon Technologies Ag Schaltkreis-Anordnung, Sensor-Array und Biosensor-Array
US7495483B2 (en) * 2005-06-30 2009-02-24 Stmicroelectronics Pvt. Ltd. Input buffer for CMOS integrated circuits
JP4812450B2 (ja) * 2006-02-07 2011-11-09 富士通コンポーネント株式会社 高速伝送用コネクタ
JP4747081B2 (ja) * 2006-12-06 2011-08-10 株式会社オートネットワーク技術研究所 シールドコネクタ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772429A (en) * 1980-10-22 1982-05-06 Toshiba Corp Semiconductor integrated circuit device
US4717836A (en) * 1986-02-04 1988-01-05 Burr-Brown Corporation CMOS input level shifting circuit with temperature-compensating n-channel field effect transistor structure
JPS62224117A (ja) * 1986-03-26 1987-10-02 Hitachi Micro Comput Eng Ltd 信号出力回路
JPS63226110A (ja) * 1987-03-16 1988-09-20 Fujitsu Ltd ヒステリシスインバ−タ回路
JPS6441521A (en) * 1987-08-08 1989-02-13 Mitsubishi Electric Corp Threshold level switching circuit
JPS6486614A (en) * 1987-09-29 1989-03-31 Nec Corp Mos input buffer
JPH01126822A (ja) * 1987-11-12 1989-05-18 Kawasaki Steel Corp プログラマブル入力回路
JPH01286619A (ja) * 1988-05-13 1989-11-17 Nec Corp 入力回路

Also Published As

Publication number Publication date
GB2232311A (en) 1990-12-05
JPH0311823A (ja) 1991-01-21
KR900019380A (ko) 1990-12-24
GB2232311B (en) 1994-03-02
FR2647608B1 (fr) 1994-11-10
KR910009810B1 (ko) 1991-11-30
JP2651246B2 (ja) 1997-09-10
FR2647608A1 (fr) 1990-11-30
DE3926657C2 (nl) 1991-07-25
NL190137B (nl) 1993-06-01
NL8902048A (nl) 1990-12-17
DE3926657A1 (de) 1990-11-29
GB8918991D0 (en) 1989-10-04

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Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
V1 Lapsed because of non-payment of the annual fee

Effective date: 19990301

XXP Miscellaneous

Free format text: A REQUEST FOR RESTORATION TO THE PRIOR STATE (AS PROVIDED FOR IN ART. 17A OF THE PATENTS ACT) HAS BEEN FILED ON 07.09.99.

XXP Miscellaneous

Free format text: THE REQUEST FOR RESTORATION TO THE PRIOR STATE AS PROVIDED FOR IN ART. 17A OF THE PATENTS ACT HAS BEEN FILED ON 7.09.99; THE RESTORATION HAS BEEN ENTERED IN THE PATENT REGISTER.

V4 Lapsed because of reaching the maximum lifetime of a patent

Effective date: 20090811