KR910005445A - 후막회로 기판의 제조방법 - Google Patents

후막회로 기판의 제조방법 Download PDF

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Publication number
KR910005445A
KR910005445A KR1019900013393A KR900013393A KR910005445A KR 910005445 A KR910005445 A KR 910005445A KR 1019900013393 A KR1019900013393 A KR 1019900013393A KR 900013393 A KR900013393 A KR 900013393A KR 910005445 A KR910005445 A KR 910005445A
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KR
South Korea
Prior art keywords
film
paste
dry
thick
substrate
Prior art date
Application number
KR1019900013393A
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English (en)
Other versions
KR940006222B1 (ko
Inventor
고오이찌 구마가이
히로아끼 오오니시
Original Assignee
다니어 아끼오
마쯔시다덴기산교 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 다니어 아끼오, 마쯔시다덴기산교 가부시기가이샤 filed Critical 다니어 아끼오
Publication of KR910005445A publication Critical patent/KR910005445A/ko
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Publication of KR940006222B1 publication Critical patent/KR940006222B1/ko

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/082—Suction, e.g. for holding solder balls or components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0029—Etching of the substrate by chemical or physical means by laser ablation of inorganic insulating material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

내용 없음

Description

후막회로 기판의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본발명의 제1실시예의 후막회로기판의 제조과정의 설명도.
제4도는 본발명의 제2실시예의 다층후막회로기판의 제조과정의 설명도.

Claims (6)

  1. 기판위에 후막페이스트를 도포하는 공정과, 도포된 페이스트막을 건조하는 공정과, 건조페이스트막에 레이져비임을 조사하고, 페이져비임 조사부의 건조페이스트막을 제거해서 패턴막을 형성하는 공정과, 패턴막을 소성하는 공정을 구비한 것을 특징으로하는 후막회로 기판의 제조방법.
  2. 제1항에 있어서, 건조공정에 있어서, 건조페이스트막속의 용제분 중량이, 건조전의 페이스트막속의 용제분의 중량의 2~50%가 되도록 건조하는 것을 특징으로하는 후막회로기판의 제조방법.
  3. 제1항에 있어서, 패턴막형성 공정에 있어서, 레이져비임 조사가공시에 발생하는 분진을 불어날리고 또는 흡인해서 제거하는 것을 특징으로하는 후막회로기관의 제조방법.
  4. 제1항에 있어서, 소성공정후, 약하게 예칭하는 공정을 구비하는 것을 특징으로하는 후막 회로기관의 제조방법.
  5. 기판위에 소성된 회로패턴막을 형성하는 공정과, 회로패턴막 및 기판의 표면에 후막절연 페이스트를 도포하는 공정과, 도포된 절연페이스트막을 건조하는 공정과, 건조절연 페이스트막의 소정 위치에 레이져비임을 조사해서 관통구멍을 형성하는 공정과, 관통구멍을 형성한 건조절연 페이스트막을 소성하는 공정을 구비한 것을 특징으로하는 후막회로기판의 제조방법.
  6. 기판위에 후막도체 페이스트를 도포하는 공정과, 도포된 도체페이스트 막을 건조하는 공정과, 건조도체 페이스트막에 레이져비임을 조사하고, 레이져비임조사부의 건조도체 페이스트막을 제거해서 회로패턴막을 형성하는 공정과, 회로 패턴막을 소성하는 공정과, 소성된 회로패턴막 및 기판의 표면에 후막절연 페이스트를 도포하는 공정과, 도포된 절연 페이스트막을 건조하는 공정과, 건조절연페이스트막의 소정위치에 레이져비임을 조사해서 관통구멍을 형성하는 공정과, 관통구멍을 형성한 건조절연페이스트막을 소성하는 공정을 구비한 것을 특징으로 하는 후막회로 기판의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900013393A 1989-08-31 1990-08-29 후막회로기판의 제조방법 KR940006222B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1-226284 1989-08-31
JP1226284A JP2616040B2 (ja) 1989-08-31 1989-08-31 厚膜回路基板の製造方法

Publications (2)

Publication Number Publication Date
KR910005445A true KR910005445A (ko) 1991-03-30
KR940006222B1 KR940006222B1 (ko) 1994-07-13

Family

ID=16842802

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900013393A KR940006222B1 (ko) 1989-08-31 1990-08-29 후막회로기판의 제조방법

Country Status (4)

Country Link
EP (1) EP0415336B1 (ko)
JP (1) JP2616040B2 (ko)
KR (1) KR940006222B1 (ko)
DE (1) DE69008459T2 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100352483B1 (ko) * 1998-12-30 2002-09-11 삼성전기주식회사 시딩층을 이용한 압전/전왜 후막의 형성방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4129835A1 (de) * 1991-09-07 1993-03-11 Bosch Gmbh Robert Leistungselektroniksubstrat und verfahren zu dessen herstellung
ATE193966T1 (de) * 1996-09-30 2000-06-15 Siemens Sa Verfahren zur bildung von mindestens zwei verdrahtungsebenen auf elektrisch isolierenden unterlagen
JP4641106B2 (ja) * 2001-02-09 2011-03-02 大日本印刷株式会社 カラーフィルタ異物除去方法
GB0125350D0 (en) * 2001-10-22 2001-12-12 Sigtronics Ltd PCB formation by laser cleaning of conductive ink
JP2005079010A (ja) * 2003-09-02 2005-03-24 Seiko Epson Corp 導電膜パターンの形成方法、電気光学装置及び電子機器
US7579224B2 (en) * 2005-01-21 2009-08-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film semiconductor device
CN103687319A (zh) * 2012-09-25 2014-03-26 昆山联滔电子有限公司 非导电基板上形成导体线路的制造方法
JP2014194989A (ja) * 2013-03-28 2014-10-09 Shibaura Mechatronics Corp パターン膜の形成装置及び方法
JP2016139679A (ja) * 2015-01-27 2016-08-04 Jsr株式会社 レーザー加工用銅膜形成用組成物、配線基板の製造方法、および電子機器
JP6605103B2 (ja) * 2017-09-27 2019-11-13 株式会社タムラ製作所 ソルダーレジスト膜のパターン形成方法、および電子基板の製造方法
DE102020107311B4 (de) 2020-03-17 2022-06-09 Tdk Electronics Ag Verfahren zur Feinstrukturierung von metallhaltigen Schichten und keramisches Vielschichtbauteil
CN113068310B (zh) * 2021-03-19 2022-08-02 北京梦之墨科技有限公司 一种双面电路板及其制作方法

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JPS5922397B2 (ja) * 1975-05-19 1984-05-26 日本電気株式会社 厚膜多層配線基板の製造方法
JPS5918669A (ja) * 1982-07-22 1984-01-31 Toshiba Corp 厚膜回路の形成法
JPS6165464A (ja) * 1984-09-07 1986-04-04 Toshiba Corp 厚膜多層基板における膜抵抗体の製造方法
JPS61194759A (ja) * 1985-02-22 1986-08-29 Mitsubishi Electric Corp 厚膜回路の製造方法
JPS61240667A (ja) * 1985-04-17 1986-10-25 Soshin Denki Kk 厚膜電子回路形成方法
JPS62216259A (ja) * 1986-03-17 1987-09-22 Fujitsu Ltd 混成集積回路の製造方法および構造
JPH01140695A (ja) * 1987-11-26 1989-06-01 Matsushita Electric Ind Co Ltd 電子回路部品の製造方法
JPH01170038A (ja) * 1987-12-25 1989-07-05 Hitachi Ltd 厚膜混成集積回路基板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100352483B1 (ko) * 1998-12-30 2002-09-11 삼성전기주식회사 시딩층을 이용한 압전/전왜 후막의 형성방법

Also Published As

Publication number Publication date
EP0415336A2 (en) 1991-03-06
EP0415336B1 (en) 1994-04-27
DE69008459T2 (de) 1994-08-18
KR940006222B1 (ko) 1994-07-13
EP0415336A3 (en) 1992-05-20
JPH0389544A (ja) 1991-04-15
JP2616040B2 (ja) 1997-06-04
DE69008459D1 (de) 1994-06-01

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