DE69008459T2 - Verfahren zur Herstellung eines Substrates für Dickschichtschaltkreise. - Google Patents

Verfahren zur Herstellung eines Substrates für Dickschichtschaltkreise.

Info

Publication number
DE69008459T2
DE69008459T2 DE69008459T DE69008459T DE69008459T2 DE 69008459 T2 DE69008459 T2 DE 69008459T2 DE 69008459 T DE69008459 T DE 69008459T DE 69008459 T DE69008459 T DE 69008459T DE 69008459 T2 DE69008459 T2 DE 69008459T2
Authority
DE
Germany
Prior art keywords
thick
producing
substrate
film circuits
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69008459T
Other languages
English (en)
Other versions
DE69008459D1 (de
Inventor
Koichi Kumagai
Hiroaki Onishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69008459D1 publication Critical patent/DE69008459D1/de
Application granted granted Critical
Publication of DE69008459T2 publication Critical patent/DE69008459T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/082—Suction, e.g. for holding solder balls or components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0029—Etching of the substrate by chemical or physical means by laser ablation of inorganic insulating material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structure Of Printed Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE69008459T 1989-08-31 1990-08-28 Verfahren zur Herstellung eines Substrates für Dickschichtschaltkreise. Expired - Fee Related DE69008459T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226284A JP2616040B2 (ja) 1989-08-31 1989-08-31 厚膜回路基板の製造方法

Publications (2)

Publication Number Publication Date
DE69008459D1 DE69008459D1 (de) 1994-06-01
DE69008459T2 true DE69008459T2 (de) 1994-08-18

Family

ID=16842802

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69008459T Expired - Fee Related DE69008459T2 (de) 1989-08-31 1990-08-28 Verfahren zur Herstellung eines Substrates für Dickschichtschaltkreise.

Country Status (4)

Country Link
EP (1) EP0415336B1 (de)
JP (1) JP2616040B2 (de)
KR (1) KR940006222B1 (de)
DE (1) DE69008459T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020107311A1 (de) 2020-03-17 2021-09-23 Tdk Electronics Ag Verfahren zur Feinstrukturierung von metallhaltigen Schichten und keramisches Vielschichtbauteil

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4129835A1 (de) * 1991-09-07 1993-03-11 Bosch Gmbh Robert Leistungselektroniksubstrat und verfahren zu dessen herstellung
WO1998015159A1 (de) * 1996-09-30 1998-04-09 Siemens S.A. Verfahren zur bildung von mindestens zwei verdrahtungsebenen auf elektrisch isolierenden unterlagen
KR100352483B1 (ko) * 1998-12-30 2002-09-11 삼성전기주식회사 시딩층을 이용한 압전/전왜 후막의 형성방법
JP4641106B2 (ja) * 2001-02-09 2011-03-02 大日本印刷株式会社 カラーフィルタ異物除去方法
GB0125350D0 (en) * 2001-10-22 2001-12-12 Sigtronics Ltd PCB formation by laser cleaning of conductive ink
JP2005079010A (ja) * 2003-09-02 2005-03-24 Seiko Epson Corp 導電膜パターンの形成方法、電気光学装置及び電子機器
US7579224B2 (en) * 2005-01-21 2009-08-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film semiconductor device
CN103687319A (zh) * 2012-09-25 2014-03-26 昆山联滔电子有限公司 非导电基板上形成导体线路的制造方法
JP2014194989A (ja) * 2013-03-28 2014-10-09 Shibaura Mechatronics Corp パターン膜の形成装置及び方法
JP2016139679A (ja) * 2015-01-27 2016-08-04 Jsr株式会社 レーザー加工用銅膜形成用組成物、配線基板の製造方法、および電子機器
JP6605103B2 (ja) * 2017-09-27 2019-11-13 株式会社タムラ製作所 ソルダーレジスト膜のパターン形成方法、および電子基板の製造方法
CN113068310B (zh) * 2021-03-19 2022-08-02 北京梦之墨科技有限公司 一种双面电路板及其制作方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5922397B2 (ja) * 1975-05-19 1984-05-26 日本電気株式会社 厚膜多層配線基板の製造方法
JPS5918669A (ja) * 1982-07-22 1984-01-31 Toshiba Corp 厚膜回路の形成法
JPS6165464A (ja) * 1984-09-07 1986-04-04 Toshiba Corp 厚膜多層基板における膜抵抗体の製造方法
JPS61194759A (ja) * 1985-02-22 1986-08-29 Mitsubishi Electric Corp 厚膜回路の製造方法
JPS61240667A (ja) * 1985-04-17 1986-10-25 Soshin Denki Kk 厚膜電子回路形成方法
JPS62216259A (ja) * 1986-03-17 1987-09-22 Fujitsu Ltd 混成集積回路の製造方法および構造
JPH01140695A (ja) * 1987-11-26 1989-06-01 Matsushita Electric Ind Co Ltd 電子回路部品の製造方法
JPH01170038A (ja) * 1987-12-25 1989-07-05 Hitachi Ltd 厚膜混成集積回路基板

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020107311A1 (de) 2020-03-17 2021-09-23 Tdk Electronics Ag Verfahren zur Feinstrukturierung von metallhaltigen Schichten und keramisches Vielschichtbauteil
DE102020107311B4 (de) 2020-03-17 2022-06-09 Tdk Electronics Ag Verfahren zur Feinstrukturierung von metallhaltigen Schichten und keramisches Vielschichtbauteil

Also Published As

Publication number Publication date
DE69008459D1 (de) 1994-06-01
EP0415336B1 (de) 1994-04-27
JP2616040B2 (ja) 1997-06-04
EP0415336A2 (de) 1991-03-06
KR940006222B1 (ko) 1994-07-13
EP0415336A3 (en) 1992-05-20
KR910005445A (ko) 1991-03-30
JPH0389544A (ja) 1991-04-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee