JPS5678147A - Manufacture of thick film hybrid integrated circuit board - Google Patents

Manufacture of thick film hybrid integrated circuit board

Info

Publication number
JPS5678147A
JPS5678147A JP15434879A JP15434879A JPS5678147A JP S5678147 A JPS5678147 A JP S5678147A JP 15434879 A JP15434879 A JP 15434879A JP 15434879 A JP15434879 A JP 15434879A JP S5678147 A JPS5678147 A JP S5678147A
Authority
JP
Japan
Prior art keywords
layer
resistance
covered
conductor
thick film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15434879A
Other languages
Japanese (ja)
Inventor
Nobuyuki Sugishita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15434879A priority Critical patent/JPS5678147A/en
Publication of JPS5678147A publication Critical patent/JPS5678147A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/705—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thick-film circuits or parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To obtain a thick film hybrid integrated board which is small-sized and is mounted in a high density, by a method wherein a conductor layer and a resistance layer are formed on a ceramic substance, and the work is covered with an insulation layer after it is trimmed so as to be covered within a desired resistance value range. CONSTITUTION:A Ag-Pd system conductor paste is printed on an A2O3 substrate 1 according to a given pattern, and is sintered at 900 deg.C to form a conductor layer 2. A RuO2 system paste, whose sheet resistance is 10, 100, 1K, 10K, and 100KOMEGA/ square, is printed on a section ranging from the substrate exposed between the layers 2 to the end surface of the layer 2, and is sintered at 850 deg.C to form a resistance layer 3. Afterwards, said layer 3 is irradiated with laser light and processed by a sand blast method, and is trimmed so that a resistance value becomes 50% of the initial one. The whole surface of the layer 3 is then covered with an insulation layer 4, and openings are formed so that they are positioned above the layer 2. A conductor layer 5, which contacts the layer 2 and is made of the Ag-Pd system paste, is formed, and openings are formed in the layer 5. A subsequent resistance layer 6, which ranges from a part above the film 4 to the ends of the surface of the layer 5, is then formed.
JP15434879A 1979-11-30 1979-11-30 Manufacture of thick film hybrid integrated circuit board Pending JPS5678147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15434879A JPS5678147A (en) 1979-11-30 1979-11-30 Manufacture of thick film hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15434879A JPS5678147A (en) 1979-11-30 1979-11-30 Manufacture of thick film hybrid integrated circuit board

Publications (1)

Publication Number Publication Date
JPS5678147A true JPS5678147A (en) 1981-06-26

Family

ID=15582191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15434879A Pending JPS5678147A (en) 1979-11-30 1979-11-30 Manufacture of thick film hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPS5678147A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103170916A (en) * 2011-12-23 2013-06-26 昆山允升吉光电科技有限公司 Method for enhancing bonding force among multiple layers of electroforming boards

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103170916A (en) * 2011-12-23 2013-06-26 昆山允升吉光电科技有限公司 Method for enhancing bonding force among multiple layers of electroforming boards

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