KR900019550A - 인쇄 회로 기판 및 제조방법 - Google Patents

인쇄 회로 기판 및 제조방법 Download PDF

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Publication number
KR900019550A
KR900019550A KR1019900006360A KR900006360A KR900019550A KR 900019550 A KR900019550 A KR 900019550A KR 1019900006360 A KR1019900006360 A KR 1019900006360A KR 900006360 A KR900006360 A KR 900006360A KR 900019550 A KR900019550 A KR 900019550A
Authority
KR
South Korea
Prior art keywords
foil
film layer
printed circuit
circuit boards
manufacturing methods
Prior art date
Application number
KR1019900006360A
Other languages
English (en)
Inventor
디. 사베지 로랜드
피. 칼라한 존
Original Assignee
미첼 씨. 베이세이
굴드 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 미첼 씨. 베이세이, 굴드 인코포레이티드 filed Critical 미첼 씨. 베이세이
Publication of KR900019550A publication Critical patent/KR900019550A/ko

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/04Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/06Interconnection of layers permitting easy separation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/20Layered products comprising a layer of metal comprising aluminium or copper
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/36Layered products comprising a layer of synthetic resin comprising polyesters
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0007Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/12Interconnection of layers using interposed adhesives or interposed materials with bonding properties
    • B32B7/14Interconnection of layers using interposed adhesives or interposed materials with bonding properties applied in spaced arrangements, e.g. in stripes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/202Conductive
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/204Di-electric
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2310/00Treatment by energy or chemical effects
    • B32B2310/021Treatment by energy or chemical effects using electrical effects
    • B32B2310/025Electrostatic charges
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2311/00Metals, their alloys or their compounds
    • B32B2311/12Copper
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2367/00Polyesters, e.g. PET, i.e. polyethylene terephthalate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/08PCBs, i.e. printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Laminated Bodies (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Wrappers (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

내용 없음

Description

인쇄 회로 기판 및 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명의 호일과 필름층이 착탈가능하게 결합된 한가지 방법을 설명하기 위하여 적층물의 일부분을 구체화한 부분 단면도, 제5도는 본 발명의 호일과 필름층이 착탈가능하게 결합된 적층물의 일부분을 구체적으로 도시한 부분 단면도, 제7도는 본 발명의 원리와 개념을 구체적으로 도시한 또다른 보호된 도전성 호일 적층물을 설명한 분해 부분품 배열도, 제8도는 본 발명의 원리와 개념을 구체적으로 도시한 적층물로 활용되어질 보호된 도전성 호일 적층판을 나타낸 예시도.

Claims (1)

  1. 두개의 면으로 된 도전성 금속호일, 상기 호일의 한면은 압축을 수반하는 적층과정에서 라미네이팅 프레스의 판 사이의 절연지지물과 점착하기에 적합하며 호일의 다른면은 도포되며 보호되는 관계로 플라스틱 필름층 위에 놓이며, 상기 호일의 다른면과 도포되며 보호되는 관계로 남아있는 필름층과 더불어 호일의 공정 및 이동이 허용되도록 상기 플라스틱 필름층은 호일에 착탈가능하게 결합되며 적층과정에서 발생하는 온도와 압력조건에 영향을 받지 않으며, 라미네이팅 프레스판에 달라붙지 않으며, 절연지지물과 호일이 적층된 후 호일의 다른면으로 부터 착탈성을 보유하는 상기 플라스틱 필름층으로 구성된 것을 특징으로 하는 보호된 도전성 오일 적층물.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900006360A 1989-05-05 1990-05-04 인쇄 회로 기판 및 제조방법 KR900019550A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34784189A 1989-05-05 1989-05-05
US07347841 1989-05-05

Publications (1)

Publication Number Publication Date
KR900019550A true KR900019550A (ko) 1990-12-24

Family

ID=23365507

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900006360A KR900019550A (ko) 1989-05-05 1990-05-04 인쇄 회로 기판 및 제조방법

Country Status (11)

Country Link
EP (1) EP0395871A3 (ko)
JP (1) JP2790708B2 (ko)
KR (1) KR900019550A (ko)
CN (1) CN1047049A (ko)
AU (1) AU631872B2 (ko)
BR (1) BR9002105A (ko)
CA (1) CA2016105A1 (ko)
DD (1) DD300087A5 (ko)
IL (1) IL94190A0 (ko)
MX (1) MX171790B (ko)
MY (1) MY105514A (ko)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5167997A (en) * 1989-05-05 1992-12-01 Gould Inc. Protected conductive foil assemblage and procedure for preparing same using static electrical forces
JPH04369290A (ja) * 1991-06-18 1992-12-22 Furukawa Saakitsuto Foil Kk 保護フィルム付き両面粗化処理銅箔及びその製法
US5153050A (en) * 1991-08-27 1992-10-06 Johnston James A Component of printed circuit boards
AU2527292A (en) * 1991-10-01 1993-04-08 Gould Electronics Inc Improved protected conductive foil assemblage and procedure for preparing same using static electrical forces
US5399239A (en) * 1992-12-18 1995-03-21 Ceridian Corporation Method of fabricating conductive structures on substrates
SG66765A1 (en) * 1993-12-02 2001-01-16 Heraeus Gmbh W C Process and apparatus for producing a laminate
EP1742294B8 (en) * 1999-02-10 2010-12-22 AMC Centurion AB A method and a device for manufacturing a roll of items
CN1104328C (zh) * 1999-04-08 2003-04-02 孟庆连 半连续周期式生产金属复合带卷的方法
CN1081128C (zh) * 1999-08-18 2002-03-20 湖北省化学研究所 软性印刷电路板专用的高分子塑料薄膜双面复合金属板的制造方法
CN101437367B (zh) * 2007-11-14 2011-03-02 比亚迪股份有限公司 一种印刷线路板的制作方法
CN101987522B (zh) * 2009-08-06 2013-01-30 烟台万泰通信科技有限公司 双层塑料薄膜复合带制作方法
WO2011077764A1 (ja) * 2009-12-22 2011-06-30 Jx日鉱日石金属株式会社 積層体の製造方及び積層体
JP5190553B1 (ja) 2012-03-06 2013-04-24 フリージア・マクロス株式会社 キャリア付き金属箔
CN106658952A (zh) * 2017-03-01 2017-05-10 苏州思诺林电子有限公司 一种线路板铜箔表面保护结构

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DE1246220B (de) * 1965-10-15 1967-08-03 Licentia Gmbh Verfahren zur Herstellung von kupferkaschierten Schichtstoffen bzw. Schichtpressstoffen
DE1778825A1 (de) * 1968-06-10 1971-08-26 Licentia Gmbh Verfahren zur Herstellung von kupferkaschierten Schichtstoffen bzw.Schichtpressstoffen
US3655496A (en) * 1969-09-25 1972-04-11 Vitta Corp Tape transfer of sinterable conductive, semiconductive or insulating patterns to electronic component substrates
JPS5517507B2 (ko) * 1972-06-29 1980-05-12
GB2091634B (en) * 1981-01-22 1984-12-05 Gen Electric Transfer lamination of vapour deposited copper thin sheets and films
JPS588636A (ja) * 1981-07-08 1983-01-18 旭化成株式会社 ロ−ル状に巻取られた光重合性エレメント
JPS588637A (ja) * 1981-07-08 1983-01-18 旭化成株式会社 ロ−ル状に巻取られた光重合性エレメント
US4568413A (en) * 1983-07-25 1986-02-04 James J. Toth Metallized and plated laminates

Also Published As

Publication number Publication date
BR9002105A (pt) 1991-08-13
EP0395871A2 (en) 1990-11-07
AU5461190A (en) 1990-11-08
MY105514A (en) 1994-10-31
AU631872B2 (en) 1992-12-10
IL94190A0 (en) 1991-01-31
MX171790B (es) 1993-11-15
DD300087A5 (de) 1992-05-21
JPH02307296A (ja) 1990-12-20
EP0395871A3 (en) 1991-09-18
CA2016105A1 (en) 1990-11-05
JP2790708B2 (ja) 1998-08-27
CN1047049A (zh) 1990-11-21

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