KR900008659A - 고성능 집적회로 칩 패키지 및 그 제조방법 - Google Patents
고성능 집적회로 칩 패키지 및 그 제조방법 Download PDFInfo
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- KR900008659A KR900008659A KR1019890016330A KR890016330A KR900008659A KR 900008659 A KR900008659 A KR 900008659A KR 1019890016330 A KR1019890016330 A KR 1019890016330A KR 890016330 A KR890016330 A KR 890016330A KR 900008659 A KR900008659 A KR 900008659A
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Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발영의 고성능 집적회로 칩 패키지의 개략적인 단면도,
제4A-4E도는 본 발명에 따르는 하나의 다중층 와이어링 서브스트레이트에서 자기-정합된 도체면들을 형성시키는 방법을 설명하는 도면,
제5A-5E도는 본 발명에 따르는 하나의 다층 와이어링 서브스트레이트에서 자기-정합된 도체면들을 형성시키는 방법을 설명하는 도면.
Claims (18)
- 자신의 한면에서 그 반대면까지 뻗어있는 도체들을 가진 하나의 지지서브스트레이트, 상기 반대면상에 있으며 부착된 집적회로칩들의 앞면을 서로 전기적으로 연결시키고 또한 상기 도체들과도 전기적으로 연결시키는 하나의 다중층 와이어링 서브스트레이트, 마이크로채널들이 자체내에 형성되어 있는 하나의 히트싱크, 및 상기 히트싱크의 한면과 상기 집 적회로칩들의 뒷면들 사이에 있는 열전도쿠션물질들로 구성된 하나의 집직회로칩패키지.
- 제1항에 있어서, 상기 열전도쿠션물질이 리플로우된 땜납인 집적회로칩패키지.
- 제2항에 있어서, 상기 리플로후된 땜납이 무르고, 저용융점의 땜납인 집적회로칩패키지.
- 제2항에 있어서, 상기 땜납이 인듐인 집적회로패키지.
- 제5항에 있어서, 상기 인듐의 두께가 약 650㎛인 집적회로칩패키지
- 제2항에 있어서, 상기 땜납이 인듐의 합금인 집적회로칩패키지.
- 제1항에 있어서, 상기 열전도쿠션물질은 땜납 예비성형체를 구성하며 상기 히트싱크는 상기 예비성형체를 확보하기 위하여 상기 한끝에 다수의 공동을 가지는 집적회로칩패키지.
- 제1항에 있어서, 상기 열전도쿠션물질이 상기 집적회로칩들에서 상기 히트싱크로 열을 효과적으로 전도하기에는 충분히 엷지만, 상기 패키지에서 칫수변이 및 열팽창에 대한 쿠션을 가지기에는 충분히 두꺼운 집적회로칩 패키지.
- 제1항에 있어서, 상기 히트싱크로부터 열을 전달하기 위하여 상기 마이크로채널들에 걸쳐 유체흐름을 제공하는 수단이 추가로 포함된 집적회로칩패키지.
- 제9항에 있어서, 유체흐름을 제공하는 상기 수단이 상기 마이크로채널들에 걸쳐 유체 난류를 제공하는 수단를 포함하는 집적 회로칩 패키지.
- 집적회로칩들에 전력, 그라운드 및 신호 연결들을 제공하기 위해 상호연결 와이어링을 가지는 서브스트레이트의 한면상에 상기 집적회로칩들의 앞면들을 부착시키는 단계, 상기 집적회로칩들의 뒷면들 가까이 히크싱크를 놀아 열전도물질의 예비성형체가 상기 집적직회로칩들의 뒷면과 상기 히트싱크 사이에 있게하는 단계, 조립된 지지서브스드레이트, 집쩍회로칩들, 히트싱크 및 예비성형체를 가열하여 상기 예비성형체를 녹이는 단계, 및 그 조립된 지지서브스트레이트, 질적회로칩들, 히트싱크 및 예비성형채를 냉각시켜 상기 집적회로칩들과 상기 히트싱크 사이에 상기 열전도물질의 일치하는 층을 형성시키는 단계들로 구성된 집적회로칩패키지 제작방법.
- 제11항에 있어서, 자신의 한면에서 그 반대면까지 뻗어있는 다수의 토체들을 갖는 하나의 지지서브스트레이트를 형성시키고 또한 지지서브스트레이트의 상기 반대면상에 있으며 집적회로칩들의 앞면을 자신의 노출된 표면에 전기 적으로 연결시키는 하나의 다중층 와이어링 서브스트레이트를 형성시킴으로써 서브스트레이트를 형성시키는 단계가 상기 부착단계를 선행하는 집적회로칩패키지 제작방법.
- 제11항에 있어서, 상기 서브스트레이트를 형성시키는 단계가 상기 부착단계를 선행하며, 상기 서브스트레이트를 형성시키는 단계는 다음 두 단계 즉, 자신의 한면에서 그 반대면까지 뻗어있는 채널들을 가지는 단일체블록의 세라믹을 소성시키고 그 채널들을 도체로 채움으로써 하나의 지지서브스트레이트를 형성시키는 단계, 및 상기 반대면상에 있으며 자기위에 다수의 절연층들 즉, 그들 각각이 하층의 전도경로상에 전기적으로 부착된 하나 혹은그 이상의 전도경로들 및 하층의 전도경로상에 전기적으로 부착된 하나의 전도평면을 포함하는 절연층들을 형성시킴으로써 하나의 다중층 와이어링 서브스트레이트를 형성시키는 단계들로 구성된 집적회로칩패키지 제작방법.
- 제13항에 있어서, 상기 전도경로들이 그들의 옆면상에 제2도체로 피복된 제1도체를 포함하는 집적회로칩 패키지 제작방법.
- 제1l항에 있어서, 상기 부착단계가 서브스트레이트의 상기 한면과 상기 집적회로칩들 사이에 땜납범프들을 제공하는 단계, 가열하여 상기 땜납범프들을 녹이고 리플로우시키는 단계, 상기 리플로우된 땜납범프들을 냉각시키는 단계틀로 구성된 집직회로칩패키시 제작방법.
- 제15항에 있어서, 상기 땜납범프들을 가열하는 단계가 조립된 서브스트레이트 집적회로칩들, 히트싱크 및 예비성형체를 가열하는 단계보다 더욱 높은 온도에서 일어나는 집적회로칩괘키지 제작방법.
- 제11항에 있어서, 히트싱크를 집적회로칩들 뒷면들 가까이 놓은 단계가 상기 예비성형체를 그들 사이에 놓고 또한 상기 노출된 면들과 히트싱크 사이의 거리를 약 60㎛로 유지시키는 단계를 포함하는 집적 회로칩 패키지 제작방법.
- 제11항에 있어서, 자체 내에 마이크로채 널들을 가지는 히트싱크를 형성시키는 단계가 히트싱크를 집적 회로 칩들의 뒷면들 가까이 놓은 단계를 선행하고, 상기 냉각시켜 열전도물질의 일치하는 층을 형성시키는 단계 다음에 상기 마이크로채널들에 걸쳐 유체흐름을 제공하는 단계가 있는 집적회로칩패키지 제작방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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- 1989-11-07 EP EP19890403056 patent/EP0368743A3/en not_active Withdrawn
- 1989-11-10 KR KR1019890016330A patent/KR900008659A/ko not_active Application Discontinuation
- 1989-11-10 JP JP1291431A patent/JPH02257664A/ja active Pending
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1992
- 1992-01-07 US US07/819,571 patent/US5325265A/en not_active Expired - Fee Related
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KR20000039046A (ko) * | 1998-12-10 | 2000-07-05 | 밍 루 | 히트싱크 부착방법 |
Also Published As
Publication number | Publication date |
---|---|
CA2002213A1 (en) | 1990-05-10 |
EP0368743A3 (en) | 1991-11-06 |
EP0368743A2 (en) | 1990-05-16 |
JPH02257664A (ja) | 1990-10-18 |
CA2002213C (en) | 1999-03-30 |
US5325265A (en) | 1994-06-28 |
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