KR870009450A - 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법 - Google Patents

반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법 Download PDF

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KR870009450A
KR870009450A KR870002325A KR870002325A KR870009450A KR 870009450 A KR870009450 A KR 870009450A KR 870002325 A KR870002325 A KR 870002325A KR 870002325 A KR870002325 A KR 870002325A KR 870009450 A KR870009450 A KR 870009450A
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tungsten
semiconductor substrate
patterned mask
deposited
selectively
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KR870002325A
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KR900003612B1 (ko
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요시미 시오야
야스시 오야시
노리히사 쓰즈기
마모루 마에다
마와아끼 이찌가와
후미다께 미네오
신이찌 이노우에
야스오 우오오찌
아끼라 다부찌
아쓰히로 쑤꾸네
다꾸야 와다나베
다까유끼 오바
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야마모도 다꾸마
후지쓰가부시끼 가이샤
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    • H01L21/205—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562—Selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

내용 없음

Description

반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래의 텅스텐을 부착시켜 놓은 횡단면도.
제2a도 내지 제2e도는 본 발명의 텅스텐을 부착시키는 과정을 도시적으로 설명한 도.

Claims (6)

  1. 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법에 있어서,
    기판상에 패턴화된 마스크를 형성하는,
    상기 패턴화된 마스크에 의하여 덮어씌워지지 않은 반도체 기판의 일부상에 텅스텐을 부착하는,
    패턴화된 마스크의 표면상에 부착된 텅스텐을 제거하는,
    상기 반도체 기판상에 상기 부착된 텅스텐을 제거한 후에 텅스텐을 부착시키는 과정을 포함하고 있는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
  2. 청구범위 제1항에 있어서,
    패턴화된 마스크가 인규소글라스 또는 실리콘 산화물로 형성되어져 있는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
  3. 청구범위 제1항에 있어서,
    6가 불산 텅스텐 가스 및 수소가스를 포함하고 있는 대기 내에서 CVD 방법에 의하여 상기 부착시키는 텅스텐이 행하여지는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
  4. 청구범위 제1항에 있어서,
    상기 패턴화된 마스크의 표면상에 부착된 텅스텐 제거는 수소가스를 포함하고 있는 대기에서 패턴화된 마스크에 열을 가함으로써 행하여지는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
  5. 청구범위 제1항에 있어서,
    상기 패턴화된 마스크의 표면상에 부착된 텅스텐 제거는 불화 수소산 용해가 쓰여지는 웨트 에칭방법에 의하여 행하여지는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
  6. 청구범위 제1항에 있어서,
    상기 패턴화된 마스크의 표면상에 부착된 텅스텐 제거는 3가불산 질소 가스를 포함하고 있는 대기에서 드라이 에칭 방법에 의하여 행하여지는 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870002325A 1986-03-17 1987-03-14 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법 KR900003612B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP61058753A JPS62216224A (ja) 1986-03-17 1986-03-17 タングステンの選択成長方法
JP58753 1986-03-17
JP61-58753 1986-03-17

Publications (2)

Publication Number Publication Date
KR870009450A true KR870009450A (ko) 1987-10-26
KR900003612B1 KR900003612B1 (ko) 1990-05-26

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KR1019870002325A KR900003612B1 (ko) 1986-03-17 1987-03-14 반도체 기판상에 텅스텐을 선택적으로 부착시키는 방법

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US (1) US4804560A (ko)
EP (1) EP0238024B1 (ko)
JP (1) JPS62216224A (ko)
KR (1) KR900003612B1 (ko)

Families Citing this family (87)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4963511A (en) * 1987-11-30 1990-10-16 Texas Instruments Incorporated Method of reducing tungsten selectivity to a contact sidewall
NL8800221A (nl) * 1988-01-29 1989-08-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
EP0345400A1 (en) * 1988-06-08 1989-12-13 L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude Selective CVD for maufacturing semiconductor devices
US4997520A (en) * 1988-06-10 1991-03-05 Texas Instruments Incorporated Method for etching tungsten
JPH02101749A (ja) * 1988-10-11 1990-04-13 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH0810682B2 (ja) * 1988-10-25 1996-01-31 三菱電機株式会社 半導体装置の製造方法
US5037775A (en) * 1988-11-30 1991-08-06 Mcnc Method for selectively depositing single elemental semiconductor material on substrates
US5112439A (en) * 1988-11-30 1992-05-12 Mcnc Method for selectively depositing material on substrates
US5231055A (en) * 1989-01-13 1993-07-27 Texas Instruments Incorporated Method of forming composite interconnect system
US5238500A (en) * 1990-05-15 1993-08-24 Semitool, Inc. Aqueous hydrofluoric and hydrochloric acid vapor processing of semiconductor wafers
US5357991A (en) * 1989-03-27 1994-10-25 Semitool, Inc. Gas phase semiconductor processor with liquid phase mixing
WO1991003834A1 (en) * 1989-09-05 1991-03-21 Mcnc Method for selectively depositing material on substrates
JP2721023B2 (ja) * 1989-09-26 1998-03-04 キヤノン株式会社 堆積膜形成法
ATE137357T1 (de) * 1989-09-26 1996-05-15 Canon Kk Verfahren zur herstellung einer abgeschiedenen schicht unter verwendung von alkylaluminiumhydrid und verfahren zur herstellung eines halbleiterbauelements
US5015323A (en) * 1989-10-10 1991-05-14 The United States Of America As Represented By The Secretary Of Commerce Multi-tipped field-emission tool for nanostructure fabrication
US6375741B2 (en) * 1991-03-06 2002-04-23 Timothy J. Reardon Semiconductor processing spray coating apparatus
KR930002673B1 (ko) * 1990-07-05 1993-04-07 삼성전자 주식회사 고융점금속 성장방법
US5077236A (en) * 1990-07-02 1991-12-31 Samsung Electronics Co., Ltd. Method of making a pattern of tungsten interconnection
US5620525A (en) * 1990-07-16 1997-04-15 Novellus Systems, Inc. Apparatus for supporting a substrate and introducing gas flow doximate to an edge of the substrate
US5843233A (en) * 1990-07-16 1998-12-01 Novellus Systems, Inc. Exclusion guard and gas-based substrate protection for chemical vapor deposition apparatus
EP0478871B1 (en) * 1990-10-01 2004-04-28 SGS-THOMSON MICROELECTRONICS S.r.l. Formation of contact plugs by blanket CVD deposition and etchback
US5064686A (en) * 1990-10-29 1991-11-12 Olin Corporation Sub-valent molybdenum, tungsten, and chromium amides as sources for thermal chemical vapor deposition of metal-containing films
KR950012918B1 (ko) * 1991-10-21 1995-10-23 현대전자산업주식회사 선택적 텅스텐 박막의 2단계 퇴적에 의한 콘택 매립방법
US5200360A (en) * 1991-11-12 1993-04-06 Hewlett-Packard Company Method for reducing selectivity loss in selective tungsten deposition
US5328868A (en) * 1992-01-14 1994-07-12 International Business Machines Corporation Method of forming metal connections
US5306666A (en) * 1992-07-24 1994-04-26 Nippon Steel Corporation Process for forming a thin metal film by chemical vapor deposition
GB9219281D0 (en) * 1992-09-11 1992-10-28 Inmos Ltd Manufacture of semiconductor devices
GB9219267D0 (en) * 1992-09-11 1992-10-28 Inmos Ltd Manufacture of semiconductor devices
US5663098A (en) * 1992-10-08 1997-09-02 Sandia Corporation Method for deposition of a conductor in integrated circuits
US5776827A (en) * 1993-08-27 1998-07-07 Yamaha Corporation Wiring-forming method
JPH07115130A (ja) * 1993-10-14 1995-05-02 Toshiba Corp 半導体装置の製造方法
US5430328A (en) * 1994-05-31 1995-07-04 United Microelectronics Corporation Process for self-align contact
US5599739A (en) * 1994-12-30 1997-02-04 Lucent Technologies Inc. Barrier layer treatments for tungsten plug
US5489552A (en) * 1994-12-30 1996-02-06 At&T Corp. Multiple layer tungsten deposition process
US5954911A (en) * 1995-10-12 1999-09-21 Semitool, Inc. Semiconductor processing using vapor mixtures
US5681423A (en) 1996-06-06 1997-10-28 Micron Technology, Inc. Semiconductor wafer for improved chemical-mechanical polishing over large area features
US6245668B1 (en) * 1998-09-18 2001-06-12 International Business Machines Corporation Sputtered tungsten diffusion barrier for improved interconnect robustness
JP3403357B2 (ja) 1999-06-03 2003-05-06 株式会社半導体先端テクノロジーズ 配線形成方法及び配線形成装置
US6534866B1 (en) 2000-04-13 2003-03-18 Micron Technology, Inc. Dual damascene interconnect
US7955972B2 (en) 2001-05-22 2011-06-07 Novellus Systems, Inc. Methods for growing low-resistivity tungsten for high aspect ratio and small features
US7589017B2 (en) * 2001-05-22 2009-09-15 Novellus Systems, Inc. Methods for growing low-resistivity tungsten film
US6635965B1 (en) * 2001-05-22 2003-10-21 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US9076843B2 (en) 2001-05-22 2015-07-07 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US7141494B2 (en) * 2001-05-22 2006-11-28 Novellus Systems, Inc. Method for reducing tungsten film roughness and improving step coverage
US7005372B2 (en) * 2003-01-21 2006-02-28 Novellus Systems, Inc. Deposition of tungsten nitride
US7262125B2 (en) * 2001-05-22 2007-08-28 Novellus Systems, Inc. Method of forming low-resistivity tungsten interconnects
US6844258B1 (en) 2003-05-09 2005-01-18 Novellus Systems, Inc. Selective refractory metal and nitride capping
US7754604B2 (en) * 2003-08-26 2010-07-13 Novellus Systems, Inc. Reducing silicon attack and improving resistivity of tungsten nitride film
DE102005004097A1 (de) * 2004-12-09 2006-06-14 BSH Bosch und Siemens Hausgeräte GmbH Geschirrspülmaschine und Verfahren zum Betreiben derselben
US7655567B1 (en) 2007-07-24 2010-02-02 Novellus Systems, Inc. Methods for improving uniformity and resistivity of thin tungsten films
US8049178B2 (en) * 2007-08-30 2011-11-01 Washington State University Research Foundation Semiconductive materials and associated uses thereof
US7772114B2 (en) * 2007-12-05 2010-08-10 Novellus Systems, Inc. Method for improving uniformity and adhesion of low resistivity tungsten film
US8053365B2 (en) * 2007-12-21 2011-11-08 Novellus Systems, Inc. Methods for forming all tungsten contacts and lines
US8062977B1 (en) 2008-01-31 2011-11-22 Novellus Systems, Inc. Ternary tungsten-containing resistive thin films
US8058170B2 (en) 2008-06-12 2011-11-15 Novellus Systems, Inc. Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics
US8551885B2 (en) * 2008-08-29 2013-10-08 Novellus Systems, Inc. Method for reducing tungsten roughness and improving reflectivity
US8129270B1 (en) 2008-12-10 2012-03-06 Novellus Systems, Inc. Method for depositing tungsten film having low resistivity, low roughness and high reflectivity
US20100144140A1 (en) * 2008-12-10 2010-06-10 Novellus Systems, Inc. Methods for depositing tungsten films having low resistivity for gapfill applications
US20100267230A1 (en) 2009-04-16 2010-10-21 Anand Chandrashekar Method for forming tungsten contacts and interconnects with small critical dimensions
US9159571B2 (en) * 2009-04-16 2015-10-13 Lam Research Corporation Tungsten deposition process using germanium-containing reducing agent
US9548228B2 (en) 2009-08-04 2017-01-17 Lam Research Corporation Void free tungsten fill in different sized features
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US9034768B2 (en) 2010-07-09 2015-05-19 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8124531B2 (en) 2009-08-04 2012-02-28 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8207062B2 (en) * 2009-09-09 2012-06-26 Novellus Systems, Inc. Method for improving adhesion of low resistivity tungsten/tungsten nitride layers
US8709948B2 (en) 2010-03-12 2014-04-29 Novellus Systems, Inc. Tungsten barrier and seed for copper filled TSV
JP6273257B2 (ja) 2012-03-27 2018-01-31 ノベラス・システムズ・インコーポレーテッドＮｏｖｅｌｌｕｓ Ｓｙｓｔｅｍｓ Ｉｎｃｏｒｐｏｒａｔｅｄ タングステンによるフィーチャ充填
US9034760B2 (en) 2012-06-29 2015-05-19 Novellus Systems, Inc. Methods of forming tensile tungsten films and compressive tungsten films
US8975184B2 (en) 2012-07-27 2015-03-10 Novellus Systems, Inc. Methods of improving tungsten contact resistance in small critical dimension features
US8834830B2 (en) * 2012-09-07 2014-09-16 Midwest Inorganics LLC Method for the preparation of anhydrous hydrogen halides, inorganic substances and/or inorganic hydrides by using as reactants inorganic halides and reducing agents
US8853080B2 (en) 2012-09-09 2014-10-07 Novellus Systems, Inc. Method for depositing tungsten film with low roughness and low resistivity
US9153486B2 (en) 2013-04-12 2015-10-06 Lam Research Corporation CVD based metal/semiconductor OHMIC contact for high volume manufacturing applications
US9082826B2 (en) 2013-05-24 2015-07-14 Lam Research Corporation Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features
US9589808B2 (en) 2013-12-19 2017-03-07 Lam Research Corporation Method for depositing extremely low resistivity tungsten
US9997405B2 (en) 2014-09-30 2018-06-12 Lam Research Corporation Feature fill with nucleation inhibition
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
US9613818B2 (en) 2015-05-27 2017-04-04 Lam Research Corporation Deposition of low fluorine tungsten by sequential CVD process
US9978605B2 (en) 2015-05-27 2018-05-22 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9978610B2 (en) 2015-08-21 2018-05-22 Lam Research Corporation Pulsing RF power in etch process to enhance tungsten gapfill performance
US10566211B2 (en) 2016-08-30 2020-02-18 Lam Research Corporation Continuous and pulsed RF plasma for etching metals
CN111095488A (zh) 2017-08-14 2020-05-01 朗姆研究公司 三维竖直nand字线的金属填充过程
CN112262457A (zh) 2018-05-03 2021-01-22 朗姆研究公司 在3d nand结构中沉积钨和其他金属的方法
JP7406684B2 (ja) * 2018-10-10 2023-12-28 東京エレクトロン株式会社 半導体デバイス内の凹状特徴部を低抵抗率金属で充填する方法
US11972952B2 (en) 2018-12-14 2024-04-30 Lam Research Corporation Atomic layer deposition on 3D NAND structures
KR20210141762A (ko) 2019-04-11 2021-11-23 램 리써치 코포레이션 고 단차 커버리지 (step coverage) 텅스텐 증착

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158873A (en) * 1980-05-14 1981-12-07 Hitachi Ltd Dry etching method
US4404235A (en) * 1981-02-23 1983-09-13 Rca Corporation Method for improving adhesion of metal film on a dielectric surface
US4517225A (en) * 1983-05-02 1985-05-14 Signetics Corporation Method for manufacturing an electrical interconnection by selective tungsten deposition
US4629635A (en) * 1984-03-16 1986-12-16 Genus, Inc. Process for depositing a low resistivity tungsten silicon composite film on a substrate
US4552783A (en) * 1984-11-05 1985-11-12 General Electric Company Enhancing the selectivity of tungsten deposition on conductor and semiconductor surfaces
US4617087A (en) * 1985-09-27 1986-10-14 International Business Machines Corporation Method for differential selective deposition of metal for fabricating metal contacts in integrated semiconductor circuits

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KR900003612B1 (ko) 1990-05-26
JPH0579164B2 (ko) 1993-11-01
JPS62216224A (ja) 1987-09-22
US4804560A (en) 1989-02-14
EP0238024A3 (en) 1990-03-14
EP0238024A2 (en) 1987-09-23
EP0238024B1 (en) 1993-11-24

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