ATE137357T1 - Verfahren zur herstellung einer abgeschiedenen schicht unter verwendung von alkylaluminiumhydrid und verfahren zur herstellung eines halbleiterbauelements - Google Patents

Verfahren zur herstellung einer abgeschiedenen schicht unter verwendung von alkylaluminiumhydrid und verfahren zur herstellung eines halbleiterbauelements

Info

Publication number
ATE137357T1
ATE137357T1 AT90310508T AT90310508T ATE137357T1 AT E137357 T1 ATE137357 T1 AT E137357T1 AT 90310508 T AT90310508 T AT 90310508T AT 90310508 T AT90310508 T AT 90310508T AT E137357 T1 ATE137357 T1 AT E137357T1
Authority
AT
Austria
Prior art keywords
producing
deposition rate
semiconductor component
deposited layer
alkylaluminum hydride
Prior art date
Application number
AT90310508T
Other languages
English (en)
Inventor
Nobuo Mikoshiba
Kazuo Tsubouchi
Kazuya Masu
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2006560A external-priority patent/JP2721021B2/ja
Priority claimed from JP2006559A external-priority patent/JP2721020B2/ja
Application filed by Canon Kk filed Critical Canon Kk
Application granted granted Critical
Publication of ATE137357T1 publication Critical patent/ATE137357T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562—Selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
AT90310508T 1989-09-26 1990-09-25 Verfahren zur herstellung einer abgeschiedenen schicht unter verwendung von alkylaluminiumhydrid und verfahren zur herstellung eines halbleiterbauelements ATE137357T1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP25002389 1989-09-26
JP25002289 1989-09-26
JP2006560A JP2721021B2 (ja) 1989-09-26 1990-01-16 堆積膜形成法
JP2006559A JP2721020B2 (ja) 1989-09-26 1990-01-16 堆積膜形成法

Publications (1)

Publication Number Publication Date
ATE137357T1 true ATE137357T1 (de) 1996-05-15

Family

ID=27454510

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90310508T ATE137357T1 (de) 1989-09-26 1990-09-25 Verfahren zur herstellung einer abgeschiedenen schicht unter verwendung von alkylaluminiumhydrid und verfahren zur herstellung eines halbleiterbauelements

Country Status (8)

Country Link
US (1) US5316972A (de)
EP (1) EP0420597B1 (de)
KR (1) KR940007444B1 (de)
AT (1) ATE137357T1 (de)
DE (1) DE69026669T2 (de)
MY (1) MY136962A (de)
PT (1) PT95431B (de)
SG (1) SG45420A1 (de)

Families Citing this family (15)

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Publication number Priority date Publication date Assignee Title
DE69125210T2 (de) * 1990-05-31 1997-08-07 Canon Kk Verfahren zur Herstellung einer Halbleitervorrichtung mit einer Verdrahtungsstruktur hoher Dichte
JPH04346231A (ja) * 1991-05-23 1992-12-02 Canon Inc 半導体装置の製造方法
EP0572212A3 (en) * 1992-05-29 1994-05-11 Sgs Thomson Microelectronics Method to form silicon doped cvd aluminium
EP0608628A3 (de) * 1992-12-25 1995-01-18 Kawasaki Steel Co Verfahren zur Herstellung einer Halbleitervorrichtung mit Mehrlagen-Verbindungsstruktur.
US6159854A (en) * 1994-08-22 2000-12-12 Fujitsu Limited Process of growing conductive layer from gas phase
US6726776B1 (en) 1995-11-21 2004-04-27 Applied Materials, Inc. Low temperature integrated metallization process and apparatus
US5877087A (en) 1995-11-21 1999-03-02 Applied Materials, Inc. Low temperature integrated metallization process and apparatus
US6077781A (en) 1995-11-21 2000-06-20 Applied Materials, Inc. Single step process for blanket-selective CVD aluminum deposition
US6309971B1 (en) 1996-08-01 2001-10-30 Cypress Semiconductor Corporation Hot metallization process
US6025269A (en) * 1996-10-15 2000-02-15 Micron Technology, Inc. Method for depositioning a substantially void-free aluminum film over a refractory metal nitride layer
US6156645A (en) * 1996-10-25 2000-12-05 Cypress Semiconductor Corporation Method of forming a metal layer on a substrate, including formation of wetting layer at a high temperature
US6187673B1 (en) 1998-09-03 2001-02-13 Micron Technology, Inc. Small grain size, conformal aluminum interconnects and method for their formation
US6245655B1 (en) * 1999-04-01 2001-06-12 Cvc Products, Inc. Method for planarized deposition of a material
US6207558B1 (en) 1999-10-21 2001-03-27 Applied Materials, Inc. Barrier applications for aluminum planarization
US11261533B2 (en) * 2017-02-10 2022-03-01 Applied Materials, Inc. Aluminum plating at low temperature with high efficiency

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4497683A (en) * 1982-05-03 1985-02-05 At&T Bell Laboratories Process for producing dielectrically isolated silicon devices
JPS6211227A (ja) * 1985-07-09 1987-01-20 Fujitsu Ltd 半導体装置の製造方法
US4824802A (en) * 1986-02-28 1989-04-25 General Electric Company Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures
JPS62216224A (ja) * 1986-03-17 1987-09-22 Fujitsu Ltd タングステンの選択成長方法
JP2559030B2 (ja) * 1986-07-25 1996-11-27 日本電信電話株式会社 金属薄膜の製造方法
JP2534848B2 (ja) * 1986-09-08 1996-09-18 富士通株式会社 高融点金属の選択成長法
US4960732A (en) * 1987-02-19 1990-10-02 Advanced Micro Devices, Inc. Contact plug and interconnect employing a barrier lining and a backfilled conductor material
US4902645A (en) * 1987-08-24 1990-02-20 Fujitsu Limited Method of selectively forming a silicon-containing metal layer
US4786615A (en) * 1987-08-31 1988-11-22 Motorola Inc. Method for improved surface planarity in selective epitaxial silicon
US4963511A (en) * 1987-11-30 1990-10-16 Texas Instruments Incorporated Method of reducing tungsten selectivity to a contact sidewall
JPH01252776A (ja) * 1988-03-31 1989-10-09 Sony Corp 気相成長アルミニウム膜形成方法
JPH01276624A (ja) * 1988-04-28 1989-11-07 Agency Of Ind Science & Technol 半導体装置の製造方法
US4898841A (en) * 1988-06-16 1990-02-06 Northern Telecom Limited Method of filling contact holes for semiconductor devices and contact structures made by that method
JPH0212913A (ja) * 1988-06-30 1990-01-17 Nippon Telegr & Teleph Corp <Ntt> 金属または半導体の電極・配線形成方法
JP2617529B2 (ja) * 1988-08-24 1997-06-04 日本電信電話株式会社 金属膜の形成方法
JP2570839B2 (ja) * 1988-12-22 1997-01-16 日本電気株式会社 Ａ▲ｌ▼ーＣｕ合金薄膜形成方法
JPH02185026A (ja) * 1989-01-11 1990-07-19 Nec Corp Ａｌ薄膜の選択的形成方法
JP2578193B2 (ja) * 1989-02-01 1997-02-05 沖電気工業株式会社 半導体素子の製造方法
US4920403A (en) * 1989-04-17 1990-04-24 Hughes Aircraft Company Selective tungsten interconnection for yield enhancement
EP0465264B1 (de) * 1990-07-06 1998-12-09 Kazuo Tsubouchi Verfahren zur Herstellung einer Metallschicht

Also Published As

Publication number Publication date
PT95431A (pt) 1991-05-22
EP0420597B1 (de) 1996-04-24
DE69026669T2 (de) 1996-10-17
MY136962A (en) 2008-12-31
PT95431B (pt) 1997-07-31
EP0420597A3 (en) 1991-08-21
DE69026669D1 (de) 1996-05-30
EP0420597A2 (de) 1991-04-03
US5316972A (en) 1994-05-31
KR940007444B1 (ko) 1994-08-18
KR910007078A (ko) 1991-04-30
SG45420A1 (en) 1998-01-16

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