JPS6422051A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6422051A JPS6422051A JP17948287A JP17948287A JPS6422051A JP S6422051 A JPS6422051 A JP S6422051A JP 17948287 A JP17948287 A JP 17948287A JP 17948287 A JP17948287 A JP 17948287A JP S6422051 A JPS6422051 A JP S6422051A
- Authority
- JP
- Japan
- Prior art keywords
- silicon nitride
- oxide film
- nitride film
- film
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To prevent the acid resistant mask from being etched in the later isotropical etching process by a method wherein, after a silicon nitride film as a second acid resistant film is formed on the whole semiconductor substrate surface, the surface of this silicon nitride film is oxidized to form a silicon oxide film as an anti-etching mask which is thin and has no pin holes. CONSTITUTION:On an N-type substrate 1, a thermal oxide film 2, a silicon nitride film 3 and a silicon oxide film 4 are sequentially formed, and with the silicon oxide film 4 as a mask they are etched to form opening parts 5. With the silicon nitride film 3 as a mask a thermal oxidation is performed to form a thermal oxide film 6 on the side and bottom of the opening parts. Thereafter, a silicon nitride film 7 is formed on the whole surface by a low pressure CVD method or the like, and subsequently a heat treatment is performed in an oxidation atmosphere to oxidize the surface of the silicon nitride film 7, thereby forming a silicon oxide film 8. With this, even if there are pin holes in the silicon oxide film which is later deposited on the silicon nitride film 7, the etching of the silicon nitride film 7 is prevented since the silicon oxide film 8 acts as an anti-etching mask in the isotropical etching process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17948287A JPS6422051A (en) | 1987-07-17 | 1987-07-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17948287A JPS6422051A (en) | 1987-07-17 | 1987-07-17 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6422051A true JPS6422051A (en) | 1989-01-25 |
Family
ID=16066607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17948287A Pending JPS6422051A (en) | 1987-07-17 | 1987-07-17 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6422051A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0838846A2 (en) * | 1996-10-24 | 1998-04-29 | Canon Kabushiki Kaisha | Method of forming an electronic device having a silicon nitride film |
| US6927134B2 (en) | 1999-04-05 | 2005-08-09 | Fairchild Semiconductor Corporation | Method of forming a trench transistor having a superior gate dielectric |
| JP2012028420A (en) * | 2010-07-20 | 2012-02-09 | Toshiba Corp | Semiconductor device and manufacturing method of the same |
| US8836028B2 (en) | 2011-04-27 | 2014-09-16 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
| US8928077B2 (en) | 2007-09-21 | 2015-01-06 | Fairchild Semiconductor Corporation | Superjunction structures for power devices |
| US9224853B2 (en) | 2007-12-26 | 2015-12-29 | Fairchild Semiconductor Corporation | Shielded gate trench FET with multiple channels |
| US9368587B2 (en) | 2001-01-30 | 2016-06-14 | Fairchild Semiconductor Corporation | Accumulation-mode field effect transistor with improved current capability |
| US9431481B2 (en) | 2008-09-19 | 2016-08-30 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
-
1987
- 1987-07-17 JP JP17948287A patent/JPS6422051A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0838846A2 (en) * | 1996-10-24 | 1998-04-29 | Canon Kabushiki Kaisha | Method of forming an electronic device having a silicon nitride film |
| EP0838846A3 (en) * | 1996-10-24 | 1999-04-28 | Canon Kabushiki Kaisha | Method of forming an electronic device having a silicon nitride film |
| US6022751A (en) * | 1996-10-24 | 2000-02-08 | Canon Kabushiki Kaisha | Production of electronic device |
| US6927134B2 (en) | 1999-04-05 | 2005-08-09 | Fairchild Semiconductor Corporation | Method of forming a trench transistor having a superior gate dielectric |
| US9368587B2 (en) | 2001-01-30 | 2016-06-14 | Fairchild Semiconductor Corporation | Accumulation-mode field effect transistor with improved current capability |
| US8928077B2 (en) | 2007-09-21 | 2015-01-06 | Fairchild Semiconductor Corporation | Superjunction structures for power devices |
| US9595596B2 (en) | 2007-09-21 | 2017-03-14 | Fairchild Semiconductor Corporation | Superjunction structures for power devices |
| US9224853B2 (en) | 2007-12-26 | 2015-12-29 | Fairchild Semiconductor Corporation | Shielded gate trench FET with multiple channels |
| US9431481B2 (en) | 2008-09-19 | 2016-08-30 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
| JP2012028420A (en) * | 2010-07-20 | 2012-02-09 | Toshiba Corp | Semiconductor device and manufacturing method of the same |
| US8836028B2 (en) | 2011-04-27 | 2014-09-16 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
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