JPS6480024A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6480024A
JPS6480024A JP23612387A JP23612387A JPS6480024A JP S6480024 A JPS6480024 A JP S6480024A JP 23612387 A JP23612387 A JP 23612387A JP 23612387 A JP23612387 A JP 23612387A JP S6480024 A JPS6480024 A JP S6480024A
Authority
JP
Japan
Prior art keywords
lamination
contact hole
source
oxide film
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23612387A
Other languages
Japanese (ja)
Inventor
Akira Nishiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23612387A priority Critical patent/JPS6480024A/en
Publication of JPS6480024A publication Critical patent/JPS6480024A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To perform the metal lamination of the source/drain by largely opening only the part of the lower part of a contact hole when opening the contact hole, and burying a metal into it by means of CVD. CONSTITUTION:An oxide film 19 for high-temperature melt is deposited on the whole surface and thereafter annealed, thereby forming a high-concentration diffusion layer 110 of phosphorus on the rear. A silicon nitride film 18 is laterally etched from the end of an oxide film 15 for the gate sidewall to the end of an element isolation oxide film 12. A silicon nitride film 16 formed on a source/drain diffusion layer 17 is removed by a dilute hydrofluoric acid process, exposing the Si surface for the W lamination. By burying W111 in the contact hole by the use of a selective CVD method, the W lamination is completed. With this, the metal lamination of the source/drain is performed.
JP23612387A 1987-09-22 1987-09-22 Semiconductor device and manufacture thereof Pending JPS6480024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23612387A JPS6480024A (en) 1987-09-22 1987-09-22 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23612387A JPS6480024A (en) 1987-09-22 1987-09-22 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6480024A true JPS6480024A (en) 1989-03-24

Family

ID=16996092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23612387A Pending JPS6480024A (en) 1987-09-22 1987-09-22 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6480024A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226020A (en) * 1988-07-15 1990-01-29 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH02308552A (en) * 1989-05-09 1990-12-21 Motorola Inc Contact structuke for semiconduct or integrated circuit and its for mation method
JP2001127151A (en) * 1999-10-26 2001-05-11 Fujitsu Ltd Semiconductor device and its manufacture method
US6383857B2 (en) 1998-07-07 2002-05-07 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method for manufacturing the same
JP2005197654A (en) * 2003-12-30 2005-07-21 Hynix Semiconductor Inc Contact plug of semiconductor device and method of forming same
EP1946366A1 (en) * 2005-10-21 2008-07-23 International Business Machines Corporation Field effect transistors (fets) with inverted source/drain metallic contacts, and method of fabricating same
JP2012175109A (en) * 2011-02-17 2012-09-10 Freescale Semiconductor Inc Anchored conductive via and method for forming the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226020A (en) * 1988-07-15 1990-01-29 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH02308552A (en) * 1989-05-09 1990-12-21 Motorola Inc Contact structuke for semiconduct or integrated circuit and its for mation method
US6383857B2 (en) 1998-07-07 2002-05-07 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method for manufacturing the same
JP2001127151A (en) * 1999-10-26 2001-05-11 Fujitsu Ltd Semiconductor device and its manufacture method
JP2005197654A (en) * 2003-12-30 2005-07-21 Hynix Semiconductor Inc Contact plug of semiconductor device and method of forming same
EP1946366A1 (en) * 2005-10-21 2008-07-23 International Business Machines Corporation Field effect transistors (fets) with inverted source/drain metallic contacts, and method of fabricating same
JP2009513007A (en) * 2005-10-21 2009-03-26 インターナショナル・ビジネス・マシーンズ・コーポレーション Field effect transistor (FET) having reverse source / drain metal contact and method of manufacturing the same
JP2012175109A (en) * 2011-02-17 2012-09-10 Freescale Semiconductor Inc Anchored conductive via and method for forming the same

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