JPS6447045A - Formation of element-isolating region - Google Patents

Formation of element-isolating region

Info

Publication number
JPS6447045A
JPS6447045A JP20478087A JP20478087A JPS6447045A JP S6447045 A JPS6447045 A JP S6447045A JP 20478087 A JP20478087 A JP 20478087A JP 20478087 A JP20478087 A JP 20478087A JP S6447045 A JPS6447045 A JP S6447045A
Authority
JP
Japan
Prior art keywords
film
nitride film
insulating film
oxide film
formation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20478087A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Yamanaka
Takashi Toida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP20478087A priority Critical patent/JPS6447045A/en
Publication of JPS6447045A publication Critical patent/JPS6447045A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To reduce a bird's beak in length by a method wherein a lower oxide film, a first nitride film, and an insulating film are formed in that order on an element region in a silicon substrate, anisotropic ion etching is accomplished in a vertical direction, a sidewall nitride film is formed, selective oxidation is accomplished, and then an element-isolating insulating film is formed. CONSTITUTION:A silicon substrate 10 is subjected to oxidation for the formation of a lower oxide film 12 that is a silicon oxide film, a first nitride film 14 and an silicon oxide insulating film 16 are formed in that order in a CVD process, and then the silicon substrate 10 is caused to be exposed in an element isolating region 22. A second nitride film 18 is deposited on the entire surface by CVD. Anisotropic ion etching is accomplished wherein the second nitride film 18 is affected, which results in a sidewall nitride film 20 on the side walls of the lower oxide film 12, the first nitride film 14, and the insulating film 16. The insulating film 16 is removed, which is followed by a selective oxidation process for the formation of an elementisolating insulating film 24 in the elementisolating region 22. After this, the side-wall oxide film 20 and the lower oxide film 12 are removed.
JP20478087A 1987-08-18 1987-08-18 Formation of element-isolating region Pending JPS6447045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20478087A JPS6447045A (en) 1987-08-18 1987-08-18 Formation of element-isolating region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20478087A JPS6447045A (en) 1987-08-18 1987-08-18 Formation of element-isolating region

Publications (1)

Publication Number Publication Date
JPS6447045A true JPS6447045A (en) 1989-02-21

Family

ID=16496223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20478087A Pending JPS6447045A (en) 1987-08-18 1987-08-18 Formation of element-isolating region

Country Status (1)

Country Link
JP (1) JPS6447045A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4336869A1 (en) * 1993-10-28 1995-05-04 Gold Star Electronics Method for producing an MOS transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4336869A1 (en) * 1993-10-28 1995-05-04 Gold Star Electronics Method for producing an MOS transistor
DE4336869C2 (en) * 1993-10-28 2003-05-28 Gold Star Electronics Method of manufacturing a MOS transistor

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