JPS5772331A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5772331A JPS5772331A JP14859780A JP14859780A JPS5772331A JP S5772331 A JPS5772331 A JP S5772331A JP 14859780 A JP14859780 A JP 14859780A JP 14859780 A JP14859780 A JP 14859780A JP S5772331 A JPS5772331 A JP S5772331A
- Authority
- JP
- Japan
- Prior art keywords
- silicon layer
- layer
- silicon
- sloping surface
- reactive ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32105—Oxidation of silicon-containing layers
Abstract
PURPOSE:To prevent polycrystalline silicon from remaining behind by making a peripheral edge part of a silicon dioxide layer a sloping surface in case where the polycrystalline silicon layer deposited on the silicon dioxide is removed selective by means of a reactive ion etching method. CONSTITUTION:An end part of a silicon dioxide layer 4 that becomes a mask is formed into a sloping surface. When reactive ion etching is executed for the silicon layer 4 and a polycrystalline silicon layer 2, said two layers 4, 2 are to have a continuous sloping surface. Then, such a structure is obtained that a side surface of the silicon layer 2 is oxidized and the surface of the silicon layer 2 is coated with the silicon layer 4. Hereby, it is permitted to prevent the silicon layer 2 from remaining.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14859780A JPS5772331A (en) | 1980-10-23 | 1980-10-23 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14859780A JPS5772331A (en) | 1980-10-23 | 1980-10-23 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5772331A true JPS5772331A (en) | 1982-05-06 |
Family
ID=15456309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14859780A Pending JPS5772331A (en) | 1980-10-23 | 1980-10-23 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5772331A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5089436A (en) * | 1987-09-21 | 1992-02-18 | Samsung Semiconductor And Telecommunications Co., Ltd. | Method for fabricating a semiconductor device by slope etching a polysiliow layer |
US5100820A (en) * | 1990-06-14 | 1992-03-31 | Oki Electric Industry Co., Ltd. | MOSFET fabrication process with lightly-doped drain using local oxidation step to pattern gate electrode |
US5354716A (en) * | 1990-05-02 | 1994-10-11 | Nec Electronics, Inc. | Method for forming a DRAM memory cell with tapered capacitor electrodes |
-
1980
- 1980-10-23 JP JP14859780A patent/JPS5772331A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5089436A (en) * | 1987-09-21 | 1992-02-18 | Samsung Semiconductor And Telecommunications Co., Ltd. | Method for fabricating a semiconductor device by slope etching a polysiliow layer |
US5354716A (en) * | 1990-05-02 | 1994-10-11 | Nec Electronics, Inc. | Method for forming a DRAM memory cell with tapered capacitor electrodes |
US5100820A (en) * | 1990-06-14 | 1992-03-31 | Oki Electric Industry Co., Ltd. | MOSFET fabrication process with lightly-doped drain using local oxidation step to pattern gate electrode |
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