JPS5575241A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS5575241A
JPS5575241A JP14945378A JP14945378A JPS5575241A JP S5575241 A JPS5575241 A JP S5575241A JP 14945378 A JP14945378 A JP 14945378A JP 14945378 A JP14945378 A JP 14945378A JP S5575241 A JPS5575241 A JP S5575241A
Authority
JP
Japan
Prior art keywords
film
wires
aluminum
metallic
resist film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14945378A
Other languages
Japanese (ja)
Inventor
Yukio Tanuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14945378A priority Critical patent/JPS5575241A/en
Publication of JPS5575241A publication Critical patent/JPS5575241A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To prevent stepwise disconnection of metallic wires of a semiconductor device by forming a metallic buried layer in advance in the connecting hole of a semiconductor by a photoetching process to thereby form a smooth surface thereon and forming the metallic wires thereon.
CONSTITUTION: An SiO2 film 107 is coated on the n+-type source and drains 105, 106 and gate electrode formed on a p--type substrate, and connecting holes 108 are opened in the layers 105 and 106 by a photoetching process. Then, an aluminum deposition film 109 and a resist film 110 are sequentially laminated thereon, the substarate is turned, an electron beam is irradiated obliquely thereto, the substrate is then developed, and the resist film 110' is thus retained in the recess of the film 110. The aluminum deposition film 109 is etched through the film 110' to thereby remove the resist film 110', and an aluminum buried layer 111 is formed in the hole 108 resulting in formation of the smooth surface thereof. When aluminum wires 112 connected to the layer 111 is then formed thereon by an aluminum deposition, stepwise disconnection of the wires is prevented. It is noted that the metallic buried material may also include polysilicon containing phosphorus (P), arsenic (As), etc.
COPYRIGHT: (C)1980,JPO&Japio
JP14945378A 1978-12-02 1978-12-02 Method of fabricating semiconductor device Pending JPS5575241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14945378A JPS5575241A (en) 1978-12-02 1978-12-02 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14945378A JPS5575241A (en) 1978-12-02 1978-12-02 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS5575241A true JPS5575241A (en) 1980-06-06

Family

ID=15475445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14945378A Pending JPS5575241A (en) 1978-12-02 1978-12-02 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS5575241A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951033A (en) * 1984-05-15 1997-02-18 Digital Equip Corp <Dec> Preparation of integrated circuit chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951033A (en) * 1984-05-15 1997-02-18 Digital Equip Corp <Dec> Preparation of integrated circuit chip

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