JPS5760854A - Wiring of semiconductor device - Google Patents

Wiring of semiconductor device

Info

Publication number
JPS5760854A
JPS5760854A JP13513680A JP13513680A JPS5760854A JP S5760854 A JPS5760854 A JP S5760854A JP 13513680 A JP13513680 A JP 13513680A JP 13513680 A JP13513680 A JP 13513680A JP S5760854 A JPS5760854 A JP S5760854A
Authority
JP
Japan
Prior art keywords
film
wiring
layer
opening
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13513680A
Other languages
Japanese (ja)
Inventor
Takashi Saigo
Teruo Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13513680A priority Critical patent/JPS5760854A/en
Publication of JPS5760854A publication Critical patent/JPS5760854A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the disconnection of a wiring layer by leveeing a level difference section, by a method wherein a contact window is formed on a substrate by a resist mask and a metal layer is again deposited in the opening for patterning after lifting off an Al film by depositing electrode metal in the opening. CONSTITUTION:For example, in an electrode formation process of a MOSFET separated by a selective oxide layer 5, an Al film 7 is evaporated for exmaple, without eliminating a resist film 8 after providing a layer insulating film 6 with an opening by using the film 8 as a mask. Next, after lifting off the film 7 on the film 8 by eliminating the film 8, an Al film 70 is again evaporated and electrode wiring layers 71-73 are formed by patterning the film 70. In this way, sharp level difference at the opening section can be reduced by leveeing the level difference section by electrode materials 7 and disconnection at wiring formation can prevented. Stepped disconnection at the upper-layer wiring can also by prevented by applying this method to the formation of lower-layer wiring in multilayer interconnection constitution.
JP13513680A 1980-09-30 1980-09-30 Wiring of semiconductor device Pending JPS5760854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13513680A JPS5760854A (en) 1980-09-30 1980-09-30 Wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13513680A JPS5760854A (en) 1980-09-30 1980-09-30 Wiring of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5760854A true JPS5760854A (en) 1982-04-13

Family

ID=15144641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13513680A Pending JPS5760854A (en) 1980-09-30 1980-09-30 Wiring of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5760854A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4902635A (en) * 1987-12-18 1990-02-20 The Agency Of Industrial Science And Technology Method for production of compound semicondutor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4902635A (en) * 1987-12-18 1990-02-20 The Agency Of Industrial Science And Technology Method for production of compound semicondutor devices

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