JPS5518056A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5518056A
JPS5518056A JP9109078A JP9109078A JPS5518056A JP S5518056 A JPS5518056 A JP S5518056A JP 9109078 A JP9109078 A JP 9109078A JP 9109078 A JP9109078 A JP 9109078A JP S5518056 A JPS5518056 A JP S5518056A
Authority
JP
Japan
Prior art keywords
substrate
electrode wirings
film
pair
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9109078A
Other languages
Japanese (ja)
Other versions
JPS6148777B2 (en
Inventor
Toshio Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9109078A priority Critical patent/JPS5518056A/en
Publication of JPS5518056A publication Critical patent/JPS5518056A/en
Publication of JPS6148777B2 publication Critical patent/JPS6148777B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To eliminate the allowance for forming openings at both lower electrode wirings with a substrate in a semiconductor device by forming self-alignment holes insulated from a pair of electrode wirings of anodizable metals extending in parallel with each other.
CONSTITUTION: An insulating film 102 is formed on a semiconductor substrate 101, and diffusion masks 103, 104 are further formed thereon the thereby form impurity diffusion regions 105, 106 in the substrate 101. Then, the mask films 103, 104 are removed to thereby form anodizable metal such as aluminum electrodes 107, 108 and to then anodize the peripheral surface of the electrodes 107, 108, which are then coated with non-porous alumina layers 109, 110. Then, phosphorus glass layer 111 are formed further on the surface over the layers 109, 110, and a photoresist film 112 is formed on the surface of the layer 111. An opening parttern 113 is provided on the film 112 to thereby chemically selectively etch through the openibg. Thus, a self-alignment hole insulated from a pair of electrode wirings 107, 108 of aluminum is perforated through an insulating film 114 on the surface of the substrate 101 to thereby electrically connect the upper layer wiring 115 to the surface of the substrate 101.
COPYRIGHT: (C)1980,JPO&Japio
JP9109078A 1978-07-25 1978-07-25 Semiconductor device Granted JPS5518056A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9109078A JPS5518056A (en) 1978-07-25 1978-07-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9109078A JPS5518056A (en) 1978-07-25 1978-07-25 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5518056A true JPS5518056A (en) 1980-02-07
JPS6148777B2 JPS6148777B2 (en) 1986-10-25

Family

ID=14016815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9109078A Granted JPS5518056A (en) 1978-07-25 1978-07-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5518056A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6822261B2 (en) 1991-03-06 2004-11-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9735773B2 (en) 2014-04-29 2017-08-15 Allegro Microsystems, Llc Systems and methods for sensing current through a low-side field effect transistor
US9720054B2 (en) 2014-10-31 2017-08-01 Allegro Microsystems, Llc Magnetic field sensor and electronic circuit that pass amplifier current through a magnetoresistance element
US9719806B2 (en) 2014-10-31 2017-08-01 Allegro Microsystems, Llc Magnetic field sensor for sensing a movement of a ferromagnetic target object
US10823586B2 (en) 2018-12-26 2020-11-03 Allegro Microsystems, Llc Magnetic field sensor having unequally spaced magnetic field sensing elements
US11280637B2 (en) 2019-11-14 2022-03-22 Allegro Microsystems, Llc High performance magnetic angle sensor
US11237020B2 (en) 2019-11-14 2022-02-01 Allegro Microsystems, Llc Magnetic field sensor having two rows of magnetic field sensing elements for measuring an angle of rotation of a magnet
US11578997B1 (en) 2021-08-24 2023-02-14 Allegro Microsystems, Llc Angle sensor using eddy currents

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011236A (en) * 1973-05-30 1975-02-05
JPS5353254A (en) * 1976-10-26 1978-05-15 Toshiba Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011236A (en) * 1973-05-30 1975-02-05
JPS5353254A (en) * 1976-10-26 1978-05-15 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6822261B2 (en) 1991-03-06 2004-11-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

Also Published As

Publication number Publication date
JPS6148777B2 (en) 1986-10-25

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