JPS6430257A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6430257A
JPS6430257A JP62187199A JP18719987A JPS6430257A JP S6430257 A JPS6430257 A JP S6430257A JP 62187199 A JP62187199 A JP 62187199A JP 18719987 A JP18719987 A JP 18719987A JP S6430257 A JPS6430257 A JP S6430257A
Authority
JP
Japan
Prior art keywords
film
silicon nitride
nitride film
region
formation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62187199A
Other languages
Japanese (ja)
Inventor
Seiji Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62187199A priority Critical patent/JPS6430257A/en
Publication of JPS6430257A publication Critical patent/JPS6430257A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To simplify a manufacturing process by a method wherein each ion- implantation region is determined through two masking processes for the element isolation and the formation of a well region. CONSTITUTION:A silicon dioxide film 2 and a silicon nitride film 3 are formed on an N-type silicon substrate 1, a part of the silicon nitride film 3 is removed which is to be an element isolation region, and then a silicon nitride film 4 is deposited thereon. A photoresist film 5 is formed which has an opening provided for a P well forming region, the silicon nitride film 4 and the silicon dioxide film 2 are subjected to etching through the photoresist film 5 used as a mask, the ion-implantation of boron is performed, and then the photoresist 5 is removed, the implanted boron is driven in for the formation of a P well 6, and thereafter a silicon dioxide film 8a and a diffusion layer 7 are formed through the selective oxidation. The silicon nitride film 4 is removed, the silicon nitride film 3 is patially removed, P<+> ions are implanted through the film 3 left unremoved as a mask, a channel stopper on the P channel side is formed, and then oxidation is partially performed for the formation of an isolation region.
JP62187199A 1987-07-27 1987-07-27 Manufacture of semiconductor device Pending JPS6430257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62187199A JPS6430257A (en) 1987-07-27 1987-07-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62187199A JPS6430257A (en) 1987-07-27 1987-07-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6430257A true JPS6430257A (en) 1989-02-01

Family

ID=16201828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62187199A Pending JPS6430257A (en) 1987-07-27 1987-07-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6430257A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58168254A (en) * 1982-03-30 1983-10-04 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58168254A (en) * 1982-03-30 1983-10-04 Fujitsu Ltd Manufacture of semiconductor device

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