KR920022477A - 반도체 장치의 비어 콘택 제조 방법 - Google Patents

반도체 장치의 비어 콘택 제조 방법 Download PDF

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Publication number
KR920022477A
KR920022477A KR1019910007712A KR910007712A KR920022477A KR 920022477 A KR920022477 A KR 920022477A KR 1019910007712 A KR1019910007712 A KR 1019910007712A KR 910007712 A KR910007712 A KR 910007712A KR 920022477 A KR920022477 A KR 920022477A
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KR
South Korea
Prior art keywords
via contact
semiconductor device
cvd layer
metal
manufacturing via
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Application number
KR1019910007712A
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English (en)
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KR930010080B1 (ko
Inventor
송승룡
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문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910007712A priority Critical patent/KR930010080B1/ko
Publication of KR920022477A publication Critical patent/KR920022477A/ko
Application granted granted Critical
Publication of KR930010080B1 publication Critical patent/KR930010080B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48Data lines or contacts therefor
    • H10B12/485Bit line contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음.

Description

반도체 장치의 비어 콘택 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 비어콘택 공정 단면도.

Claims (1)

  1. 비트라인인 제1메탈(1)위에 제1CVD층(2)을 증착하는 공정과, 상기 제1CVD층(2)위에 SOC(3)를 도포하고 열처리하는 공정과, 마스킹 공정을 거쳐 상기 SOG(3)를 식각하여 비어보다 큰 식각영역을 형성하는 공정과, 상기 식각된 SOG(3) 부분과 제1CVD층(2)위에 제2CVD층(4)을 형성하는 공정과, 상기 제1메탈(1)이 드러나도록 마스킹 공정에 의해 비어콘택홀(5)을 형성하고 제2메탈(6)을 증착시키는 공정을 차례로 실시하여서 이루어짐을 특징으로 하는 반도체 장치의 비어콘택 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910007712A 1991-05-13 1991-05-13 반도체 장치의 금속배선 방법 KR930010080B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910007712A KR930010080B1 (ko) 1991-05-13 1991-05-13 반도체 장치의 금속배선 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910007712A KR930010080B1 (ko) 1991-05-13 1991-05-13 반도체 장치의 금속배선 방법

Publications (2)

Publication Number Publication Date
KR920022477A true KR920022477A (ko) 1992-12-19
KR930010080B1 KR930010080B1 (ko) 1993-10-14

Family

ID=19314374

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910007712A KR930010080B1 (ko) 1991-05-13 1991-05-13 반도체 장치의 금속배선 방법

Country Status (1)

Country Link
KR (1) KR930010080B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100406733B1 (ko) * 2001-05-08 2003-11-20 아남반도체 주식회사 반도체 소자의 제조 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100406733B1 (ko) * 2001-05-08 2003-11-20 아남반도체 주식회사 반도체 소자의 제조 방법

Also Published As

Publication number Publication date
KR930010080B1 (ko) 1993-10-14

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