KR20130127013A - 여분-테이퍼형 전이 비아들을 포함하는 반도체 디바이스의 금속화 시스템 - Google Patents

여분-테이퍼형 전이 비아들을 포함하는 반도체 디바이스의 금속화 시스템 Download PDF

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KR20130127013A
KR20130127013A KR1020117016628A KR20117016628A KR20130127013A KR 20130127013 A KR20130127013 A KR 20130127013A KR 1020117016628 A KR1020117016628 A KR 1020117016628A KR 20117016628 A KR20117016628 A KR 20117016628A KR 20130127013 A KR20130127013 A KR 20130127013A
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South Korea
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via opening
opening
mask
forming
dielectric material
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Korean (ko)
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프랑크 포이스텔
토마스 베르너
카이 프로베르그
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
에이엠디 팹 36 리미티드 라이어빌리티 컴퍼니 & 코. 카게
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Publication of KR20130127013A publication Critical patent/KR20130127013A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020117016628A 2008-12-31 2009-12-29 여분-테이퍼형 전이 비아들을 포함하는 반도체 디바이스의 금속화 시스템 Ceased KR20130127013A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102008063430.1 2008-12-31
DE102008063430.1A DE102008063430B4 (de) 2008-12-31 2008-12-31 Verfahren zur Herstellung eines Metallisierungssystem eines Halbleiterbauelements mit zusätzlich verjüngten Übergangskontakten
US12/634,216 2009-12-09
US12/634,216 US8835303B2 (en) 2008-12-31 2009-12-09 Metallization system of a semiconductor device comprising extra-tapered transition vias
PCT/EP2009/009308 WO2010076019A1 (en) 2008-12-31 2009-12-29 A metallization system of a semiconductor device comprising extra-tapered transition vias

Publications (1)

Publication Number Publication Date
KR20130127013A true KR20130127013A (ko) 2013-11-22

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KR1020117016628A Ceased KR20130127013A (ko) 2008-12-31 2009-12-29 여분-테이퍼형 전이 비아들을 포함하는 반도체 디바이스의 금속화 시스템

Country Status (6)

Country Link
US (1) US8835303B2 (enExample)
JP (1) JP2012514319A (enExample)
KR (1) KR20130127013A (enExample)
CN (1) CN102362343B (enExample)
DE (1) DE102008063430B4 (enExample)
WO (1) WO2010076019A1 (enExample)

Cited By (3)

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US9728604B2 (en) 2015-04-09 2017-08-08 Samsung Electronics Co., Ltd. Semiconductor devices
KR20210002324A (ko) * 2019-06-28 2021-01-07 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 백엔드 오브 라인 비아와 금속 라인간 마진 개선
US12255134B2 (en) 2019-06-28 2025-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of back end of line via to metal line margin improvement

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FR2975826A1 (fr) * 2011-05-27 2012-11-30 St Microelectronics Crolles 2 Procede de formation d'un trou ou d'une tranchee ayant un profil evase
JP2013021001A (ja) * 2011-07-07 2013-01-31 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
US8987916B2 (en) * 2011-11-28 2015-03-24 Freescale Semiconductor, Inc. Methods and apparatus to improve reliability of isolated vias
JP5891846B2 (ja) * 2012-02-24 2016-03-23 富士通セミコンダクター株式会社 半導体装置の製造方法
US8815752B2 (en) * 2012-11-28 2014-08-26 Micron Technology, Inc. Methods of forming features in semiconductor device structures
US9305886B2 (en) * 2013-12-18 2016-04-05 Globalfoundries Singapore Pte. Ltd. Integrated circuits having crack-stop structures and methods for fabricating the same
US10163778B2 (en) 2014-08-14 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of damascene structure
CN104505471B (zh) * 2014-12-22 2017-12-29 昆山工研院新型平板显示技术中心有限公司 一种高开口率掩膜板的制备方法及掩膜板
US9536826B1 (en) * 2015-06-15 2017-01-03 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (finFET) device structure with interconnect structure
US9679850B2 (en) * 2015-10-30 2017-06-13 Taiwan Semiconductor Manufacturing Company Ltd. Method of fabricating semiconductor structure
US9917027B2 (en) * 2015-12-30 2018-03-13 Globalfoundries Singapore Pte. Ltd. Integrated circuits with aluminum via structures and methods for fabricating the same
CN107622992B (zh) 2016-07-14 2021-04-27 联华电子股份有限公司 半导体元件及其制作方法
US10276485B2 (en) 2017-08-02 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory
US10998259B2 (en) 2017-08-31 2021-05-04 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US10522394B2 (en) * 2017-09-25 2019-12-31 Marvell World Trade Ltd. Method of creating aligned vias in ultra-high density integrated circuits
US10566411B2 (en) * 2017-12-07 2020-02-18 Globalfoundries Inc. On-chip resistors with direct wiring connections
KR102751263B1 (ko) 2018-08-07 2025-01-06 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11158571B2 (en) * 2018-12-20 2021-10-26 Micron Technology, Inc. Devices including conductive interconnect structures, related electronic systems, and related methods
WO2020140202A1 (en) * 2019-01-02 2020-07-09 Yangtze Memory Technologies Co., Ltd. Method for forming dual damascene interconnect structure
US20210020455A1 (en) * 2019-07-17 2021-01-21 Nanya Technology Corporation Conductive via structure
US11652049B2 (en) 2021-03-10 2023-05-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of forming thereof
KR20230009126A (ko) * 2021-07-08 2023-01-17 엘지이노텍 주식회사 회로기판 및 이를 포함하는 패키지 기판
KR20230013438A (ko) * 2021-07-19 2023-01-26 삼성전자주식회사 반도체 장치
KR20230135384A (ko) * 2022-03-16 2023-09-25 주식회사 디비하이텍 저항 변화 메모리 장치 및 그 제조 방법
US20240332074A1 (en) * 2023-03-27 2024-10-03 International Business Machines Corporation Metal wires with expanded sidewalls

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US6605540B2 (en) * 2001-07-09 2003-08-12 Texas Instruments Incorporated Process for forming a dual damascene structure
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JP4476171B2 (ja) * 2005-05-30 2010-06-09 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
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US9728604B2 (en) 2015-04-09 2017-08-08 Samsung Electronics Co., Ltd. Semiconductor devices
US10217820B2 (en) 2015-04-09 2019-02-26 Samsung Electronics Co., Ltd. Semiconductor devices
US10700164B2 (en) 2015-04-09 2020-06-30 Samsung Electronics Co., Ltd. Semiconductor devices
KR20210002324A (ko) * 2019-06-28 2021-01-07 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 백엔드 오브 라인 비아와 금속 라인간 마진 개선
US11276638B2 (en) 2019-06-28 2022-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Back end of line via to metal line margin improvement
US12255134B2 (en) 2019-06-28 2025-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of back end of line via to metal line margin improvement

Also Published As

Publication number Publication date
DE102008063430A1 (de) 2010-07-08
DE102008063430B4 (de) 2016-11-24
CN102362343B (zh) 2015-03-25
US20100164121A1 (en) 2010-07-01
CN102362343A (zh) 2012-02-22
WO2010076019A1 (en) 2010-07-08
US8835303B2 (en) 2014-09-16
JP2012514319A (ja) 2012-06-21

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