KR20090088842A - 비휘발성 반도체 기억 장치 및 그 제조 방법 - Google Patents
비휘발성 반도체 기억 장치 및 그 제조 방법 Download PDFInfo
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- KR20090088842A KR20090088842A KR1020097000780A KR20097000780A KR20090088842A KR 20090088842 A KR20090088842 A KR 20090088842A KR 1020097000780 A KR1020097000780 A KR 1020097000780A KR 20097000780 A KR20097000780 A KR 20097000780A KR 20090088842 A KR20090088842 A KR 20090088842A
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Abstract
Description
Claims (13)
- 기판과,상기 기판상에 형성된 스트라이프 형상의 하층 전극 배선과,상기 하층 전극 배선을 포함하는 상기 기판상에 배치되고, 상기 하층 전극 배선과 대향하고 있는 위치에 콘택트 홀이 형성된 층간 절연층과,상기 하층 전극 배선에 접속하는 저항 변화층과,상기 저항 변화층과 접속하고, 상기 저항 변화층상에 형성된 비오믹성 소자를 구비하되,상기 비오믹성 소자는, 복수층의 반도체층의 적층 구성, 금속 전극체층과 절연체층의 적층 구성, 또는, 금속 전극체층과 반도체층의 적층 구성으로 이루어지고, 상기 콘택트 홀 안에 상기 적층 구성 중 어느 1층이 실장 형성되고, 또한 상기 적층 구성의 그 밖의 층 내의 반도체층 또는 절연체층은, 상기 콘택트 홀의 개구보다 큰 면적을 갖고, 상기 층간 절연층상에 형성되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항에 있어서,상기 층간 절연층, 상기 저항 변화층 및 상기 비오믹성 소자를 하나의 구성 단위로 하고, 상기 구성 단위를 복수개 적층한 것을 특징으로 하는 비휘발성 반도 체 기억 장치.
- 제 1 항 또는 제 2 항에 있어서,상기 비오믹성 소자를 구성하는 상기 적층 구성의 상기 그 밖의 층이, 상기 층간 절연층상에 있어서 상기 하층 전극 배선에 대하여 교차하는 스트라이프 형상으로 형성되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항 내지 제 3 항 중 어느 한 항에 있어서,상기 비오믹성 소자상에서 상기 비오믹성 소자에 접속하고, 상기 하층 전극 배선에 교차하는 스트라이프 형상의 상층 전극 배선을 더 갖는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항 내지 제 4 항 중 어느 한 항에 있어서,상기 비오믹성 소자가, 절연체층과, 상기 절연체층을 사이에 갖는 금속 전극체층의 3층의 적층 구성으로 이루어지는 MIM 다이오드이며, 상기 저항 변화층측의 상기 금속 전극체층이 상기 콘택트 홀 안에 실장 형성되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항 내지 제 4 항 중 어느 한 항에 있어서,상기 비오믹성 소자가, 반도체층과, 상기 반도체층을 사이에 갖는 금속 전극체층의 3층의 적층 구성으로 이루어지는 MSM 다이오드이며, 상기 저항 변화층측의 상기 금속 전극체층이 상기 콘택트 홀 안에 실장 형성되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항 내지 제 4 항 중 어느 한 항에 있어서,상기 비오믹성 소자가, p형 반도체층과 n형 반도체층의 2층의 적층 구성으로 이루어지는 pn접합 다이오드이며, 상기 p형 반도체층 또는 상기 n형 반도체층이 상기 콘택트 홀 안에 실장되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 제 1 항 내지 제 4 항 중 어느 한 항에 있어서,상기 비오믹성 소자가, 반도체층과 금속 전극체층의 2층의 적층 구성으로 이루어지는 쇼트키 다이오드(Schottky diode)이며, 상기 금속 전극체층이 상기 콘택트 홀 안에 실장되어 있는 것을 특징으로 하는 비휘발성 반도체 기억 장치.
- 기판상에 스트라이프 형상의 하층 전극 배선을 형성하는 공정과,상기 하층 전극 배선을 포함하는 상기 기판상에 층간 절연층을 형성하는 공정과,상기 층간 절연층의 상기 하층 전극 배선과 대향하는 위치에 콘택트 홀을 형성하는 공정과,상기 층간 절연층의 표면측의 일부를 남기고, 상기 콘택트 홀 안에 상기 저항 변화층을 실장 형성하는 공정과,상기 콘택트 홀의 표면측에, 비오믹성 소자를 구성하는 적층 구성 중 적어도 1층을 더 실장 형성하는 공정과,상기 비오믹성 소자를 구성하는 상기 적층 구성 중 그 밖의 층을 상기 층간 절연층상에, 적어도 상기 콘택트 홀의 개구보다 큰 면적으로 형성하는 공정을 포함하는 것을 특징으로 하는 비휘발성 반도체 기억 장치의 제조 방법.
- 제 9 항에 있어서,상기 콘택트 홀 안에 상기 저항 변화층을 실장 형성하는 공정은, 상기 콘택트 홀 내 및 상기 층간 절연층상에, 상기 저항 변화층과 동일 재료로 이루어지는 제 1 퇴적막을 형성하는 공정과, 상기 층간 절연층의 표면을 덮는 상기 제 1 퇴적막을 제거하는 공정을 포함하고,상기 콘택트 홀의 표면측에 상기 비오믹성 소자를 구성하는 적층 구성 중 1층을 더 실장 형성하는 공정은, 상기 콘택트 홀 안의 상기 제 1 퇴적막의 일부를 제거하고, 상기 콘택트 홀 및 상기 제 1 퇴적막에 의해 이루어지는 오목부를 형성하는 공정과, 상기 오목부 내 및 상기 층간 절연층상에, 상기 1층과 동일 재료로 이루어지는 제 2 퇴적막을 형성하는 공정과, 상기 층간 절연층의 표면을 덮는 상기 제 2 퇴적막을 제거하는 공정을 포함하는 것을 특징으로 하는 비휘발성 반도체 기억 장치의 제조 방법.
- 청구항 9 또는 청구항 10에 기재된 각 공정을, 복수회 반복함으로써, 상기 저항 변화층과 상기 비오믹성 소자를 적층하는 것을 특징으로 하는 비휘발성 반도체 기억 장치의 제조 방법.
- 제 9 항 내지 제 11 항 중 어느 한 항에 있어서,상기 비오믹성 소자를 구성하는 상기 적층 구성 중 상기 그 밖의 층을, 상기 층간 절연층상에 있어서 상기 하층 전극 배선에 대하여 교차하는 스트라이프 형상으로 형성하는 것을 특징으로 하는 비휘발성 반도체 기억 장치의 제조 방법.
- 제 9 항 내지 제 11 항 중 어느 한 항에 있어서,상기 비오믹성 소자상에서 상기 비오믹성 소자에 접속하고, 상기 하층 전극 배선에 교차하는 스트라이프 형상의 상층 전극 배선을 더 형성하는 것을 특징으로 하는 비휘발성 반도체 기억 장치의 제조 방법.
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