KR20070115785A - 빌드업 기판, 그것을 갖는 전자 부품 및 전자 기기 - Google Patents
빌드업 기판, 그것을 갖는 전자 부품 및 전자 기기 Download PDFInfo
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- KR20070115785A KR20070115785A KR1020070053904A KR20070053904A KR20070115785A KR 20070115785 A KR20070115785 A KR 20070115785A KR 1020070053904 A KR1020070053904 A KR 1020070053904A KR 20070053904 A KR20070053904 A KR 20070053904A KR 20070115785 A KR20070115785 A KR 20070115785A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09336—Signal conductors in same plane as power plane
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09636—Details of adjacent, not connected vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09718—Clearance holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0425—Solder powder or solder coated metal powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
Abstract
Description
Claims (10)
- 다층 구조의 빌드업층을 갖는 빌드업 기판에 있어서,상기 다층 구조는,신호 배선 패턴과;상기 신호 배선 패턴에 접속된 패드와;상기 패드와 동일 층에서 상기 패드의 주위에 배치된 절연부와;상기 동일 층에서 상기 절연부의 주위에 배치된 도체를 가지며,상기 동일 층에서 상기 패드의 윤곽과 상기 패드에 가장 가까운 상기 도체와의 최소 간격으로 정의되는 킵 아웃(keep out)이 상기 다층 구조의 적어도 2개소에서 다른 것을 특징으로 하는 빌드업 기판.
- 다층 구조의 코어층을 갖는 빌드업 기판에 있어서,상기 다층 구조는,신호 배선 패턴과;상기 신호 배선 패턴에 접속된 패드와;상기 패드와 동일 층에서 상기 패드의 주위에 배치된 절연부와;상기 동일 층에서 상기 절연부의 주위에 배치된 도체를 가지며,상기 동일 층에서 상기 패드의 윤곽과 상기 패드에 가장 가까운 상기 도체와의 최소 간격으로 정의되는 킵 아웃이 상기 다층 구조의 적어도 2개소에서 다른 것을 특징으로 하는 빌드업 기판.
- 제1항 또는 제2항에 있어서, 상기 킵 아웃은 상기 다층 구조의 적어도 2층에서 다른 것을 특징으로 하는 빌드업 기판.
- 제1항 또는 제2항에 있어서, 상기 킵 아웃은 상기 동일 층의 적어도 2개소에서 다른 것을 특징으로 하는 빌드업 기판.
- 제4항에 있어서, 상기 다층 구조는 고주파의 신호를 전송하기 위한 제1 경로와, 상기 제1 경로보다도 낮은 주파수의 신호를 전송하기 위한 제2 경로를 가지며, 상기 동일 층에서 상기 제1 경로의 킵 아웃은 상기 제2 경로의 킵 아웃보다도 큰 것을 특징으로 하는 빌드업 기판.
- 제1항 또는 제2항에 있어서, 상기 절연부가 복수의 소구멍부로 구성되는 경우에, 상기 킵 아웃은 상기 패드의 윤곽과 상기 복수의 소구멍부의 윤곽 사이의 최단 거리와 상기 절연부의 면적에 기초하여 결정되는 것을 특징으로 하는 빌드업 기판.
- 제1항 또는 제2항에 있어서, 상기 다층 구조는,외부의 프린트 기판에 가장 가까운 제1 도전층과;상기 제1 도전층에 가장 가까운 제2 도전층을 가지며,상기 제2 도전층의 킵 아웃은 상기 제1 도전층의 킵 아웃 이상인 것을 특징으로 하는 빌드업 기판.
- 제1항 또는 제2항에 있어서, 상기 패드를 갖는 패드부 도전층의 가장 근처에 배치된 도전층은 상기 패드부 도전층의 상기 패드에 대응하는 위치에 패드를 갖지 않는 절연부를 갖는, 패드가 없는 도전층인 것을 특징으로 하는 빌드업 기판.
- 제1항 내지 제8항 중 어느 한 항에 기재한 빌드업 기판을 갖는 것을 특징으로 하는 전자 부품.
- 제1항 내지 제8항 중 어느 한 항에 기재한 빌드업 기판을 갖는 전자 부품을 갖는 것을 특징으로 하는 전자 기기.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006153964 | 2006-06-01 | ||
JPJP-P-2006-00153964 | 2006-06-01 | ||
JP2007141005A JP5050655B2 (ja) | 2006-06-01 | 2007-05-28 | ビルドアップ基板、それを有する電子部品及び電子機器 |
JPJP-P-2007-00141005 | 2007-05-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20070115785A true KR20070115785A (ko) | 2007-12-06 |
KR100864468B1 KR100864468B1 (ko) | 2008-10-22 |
Family
ID=38872538
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020070053904A KR100864468B1 (ko) | 2006-06-01 | 2007-06-01 | 빌드업 기판, 그것을 갖는 전자 부품 및 전자 기기 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8304662B2 (ko) |
JP (1) | JP5050655B2 (ko) |
KR (1) | KR100864468B1 (ko) |
CN (1) | CN101101899B (ko) |
TW (1) | TWI342609B (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011138846A (ja) * | 2009-12-27 | 2011-07-14 | Kyocer Slc Technologies Corp | 配線基板 |
JP5254274B2 (ja) * | 2010-05-18 | 2013-08-07 | 欣興電子股▲ふん▼有限公司 | 回路基板 |
US8519270B2 (en) | 2010-05-19 | 2013-08-27 | Unimicron Technology Corp. | Circuit board and manufacturing method thereof |
KR102554093B1 (ko) * | 2015-12-31 | 2023-07-10 | 엘지디스플레이 주식회사 | 인쇄회로기판 및 이를 포함하는 표시장치 |
US10921859B2 (en) * | 2017-04-10 | 2021-02-16 | Securaplane Technologies, Inc. | Composite electronics cases and methods of making and using the same |
JP7200723B2 (ja) * | 2019-02-08 | 2023-01-10 | 住友電気工業株式会社 | コネクタ付き多心ケーブル |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3090453B2 (ja) * | 1989-07-10 | 2000-09-18 | 株式会社日立製作所 | 厚膜薄膜積層基板およびそれを用いた電子回路装置 |
JPH0563076A (ja) | 1991-08-30 | 1993-03-12 | Fujitsu Ltd | 半導体ウエーハの切断方法 |
JPH0613181A (ja) | 1992-06-29 | 1994-01-21 | Fuji Electric Co Ltd | 有機薄膜発光素子の発光方法 |
JPH07202359A (ja) | 1993-12-30 | 1995-08-04 | Sony Corp | 回路基板 |
JPH07221510A (ja) | 1994-02-03 | 1995-08-18 | Advantest Corp | プリント基板を用いた高速信号の伝送線路 |
JP3206561B2 (ja) * | 1998-10-01 | 2001-09-10 | 日本電気株式会社 | 多層配線基板 |
JP2001088097A (ja) * | 1999-09-16 | 2001-04-03 | Hitachi Ltd | ミリ波多層基板モジュール及びその製造方法 |
WO2001099480A2 (en) * | 2000-06-19 | 2001-12-27 | 3M Innovative Properties Company | Printed circuit board having inductive vias |
US7435912B1 (en) * | 2002-05-14 | 2008-10-14 | Teradata Us, Inc. | Tailoring via impedance on a circuit board |
JP2005019483A (ja) * | 2003-06-24 | 2005-01-20 | Hitachi Ltd | スルーホール構造、配線基板及び電子装置 |
JP2005019732A (ja) * | 2003-06-26 | 2005-01-20 | Kyocera Corp | 配線基板およびこれを用いた電子装置 |
JP2005236064A (ja) * | 2004-02-20 | 2005-09-02 | Matsushita Electric Ind Co Ltd | 信号伝送ペア配線およびその製造方法 |
JP2005243864A (ja) * | 2004-02-26 | 2005-09-08 | Kyocera Corp | 配線基板 |
JP2005340686A (ja) | 2004-05-31 | 2005-12-08 | Fujitsu Ltd | 積層基板及びその製造方法、かかる積層基板を有する電子機器 |
JP2006049645A (ja) * | 2004-08-05 | 2006-02-16 | Ngk Spark Plug Co Ltd | 配線基板 |
US7064279B2 (en) * | 2004-09-23 | 2006-06-20 | Motorola, Inc. | Circuit board having an overlapping via |
JP2006128301A (ja) * | 2004-10-27 | 2006-05-18 | Kyocera Corp | 配線基板 |
JP4183199B2 (ja) * | 2005-12-28 | 2008-11-19 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体パッケージ及びその製造方法 |
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2007
- 2007-05-28 JP JP2007141005A patent/JP5050655B2/ja active Active
- 2007-05-31 TW TW096119492A patent/TWI342609B/zh active
- 2007-06-01 KR KR1020070053904A patent/KR100864468B1/ko active IP Right Grant
- 2007-06-01 CN CN2007101098702A patent/CN101101899B/zh active Active
- 2007-06-01 US US11/806,680 patent/US8304662B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2008010848A (ja) | 2008-01-17 |
JP5050655B2 (ja) | 2012-10-17 |
KR100864468B1 (ko) | 2008-10-22 |
CN101101899A (zh) | 2008-01-09 |
TWI342609B (en) | 2011-05-21 |
TW200810064A (en) | 2008-02-16 |
US20070295533A1 (en) | 2007-12-27 |
CN101101899B (zh) | 2010-11-10 |
US8304662B2 (en) | 2012-11-06 |
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